2
Internal Block Diagram
V
CC
100 nF
V
PWR
VCC
Power
Supply
V
S
UVF
VPWR_PROTECTED
CP
VPWR
Reverse
Battery
Protection
Oscillator
Power-on
Reset
Under-voltage
Detection
OVF
Battery
Clamp
Charge
CPF
Pump
SO
SPI Control
CSB
SCLK
SI
RSTB
SPIF
OTW1
OTW2
OTS1
Thermal
Prewarning
Temperature
Shut-down
SPI
Selectable
Slope Control
OC1
OLON1
OLOFF1
Selectable Over-
current Protection
Selectable Open-
load Detection
Selectable
Current Sensing
Fault
Management
Limp Home Control
LIMP
IN1
IN2
IN4
Logic
V
CC
CLKF
WAKEB OR
RSTB
OUT1
Output Voltage
Monitoring
OUT1 Channel
OUT1
OUT2 Channel
OUT2
OUT3
OUT4
Reference
PWM Clock
OUT3 Channel
OUT4 Channel
OUT4 Channel
CLK
V
CC
5k
Clock Failure
Detection
OUT5 Channel
V
CC
VPWR_PROTECTED
OUT5
Smart Power
Switch Drive
5
A to D Convertion
CSNS
SYNCB
Selectable
Delay
Selectable
Analog
Feedback
OUT6
CSNS
5k
VPWR_PROTECTED
Control die
Temperature
Monitoring
Power
Voltage
Monitoring
GND
Figure 2. Simplified Internal Block Diagram (Penta version)
MC07XSF517
Analog Integrated Circuit Device Data
Freescale Semiconductor
Power channels
IN3
PWM Module
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
