Table 3. Static Electrical Characteristics (continued)
Characteristics noted under conditions 6.0 V VPWR 20 V, 3.0 V VDD 5.5 V, -40 C TA 125 C, GND = 0 V, unless
otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25 °C under nominal conditions, unless
otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
CONTROL INTERFACE
Input Logic High Voltage(19)
Input Logic Low Voltage(19)
V
2.0
-0.3
5.0
5.0
–
–
–
VDD+0.3
0.8
V
V
IH
V
IL
Input Logic Pull-down Current (SCLK, SI)(22)
Input Logic Pull-up Current (CSB) (23)
SO, FSB Tri-state Capacitance(20)
I
–
20
A
A
pF
k
pF
V
DWN
I
–
20
UP
C
–
20
SO
Input Logic Pull-down Resistor (RSTB, WAKE, CLOCk and IN[0:1])
Input Capacitance(20)
R
125
–
250
4.0
500
12
DWN
CIN
Wake Input Clamp Voltage(21)
V
CL(WAKE)
• I
< 2.5 mA
18
25
–
32
-0.3
–
CL(WAKE)
Wake Input Forward Voltage
• I = -2.5 mA
V
V
V
F(WAKE)
-2.0
CL(WAKE)
SO High-state Output Voltage
• I = 1.0 mA
V
SOH
V
-0.4
–
OH
DD
SO and FSB Low-state Output Voltage
V
V
SOL
• I = -1.0 mA
OL
–
–
0.4
2.0
SO, CSNS and FSB Tri-state Leakage Current
I
A
k
SO(LEAK)
RFS
• CSB = VIH and 0 V < VSO < VDD, or FSB = 5.5 V, or CSNS = 0.0 V
-2.0
0.0
FSI External Pull-down Resistance(24)
• Watchdog Disabled
–
0.0
1.0
–
• Watchdog Enabled
10
Infinite
Notes
19. Upper and lower logic threshold voltage range applies to SI, CSB, SCLK, FSB, IN[0:1], CLOCK and WAKE input signals. The WAKE and
RSTB signals may be supplied by a derived voltage referenced to V
.
PWR
20. Input capacitance of SI, CSB, SCLK, RSTB, IN[0:1], CLOCK and WAKE. This parameter is guaranteed by process monitoring but is not
production tested.
21. The current must be limited by a series resistance when using voltages > 7.0 V.
22. Pull-down current is with VSI > 1.0 V and VSCLK > 1.0 V.
23. Pull-up current is with VCSB < 2.0 V. CSB has an active internal pull-up to V
.
DD
24. In Fail-safe HS[0:1] depends respectively on IN[0:1]. FSI has an active internal pull-up to V
~ 3.0 V.
REG
07XSC200
Analog Integrated Circuit Device Data
Freescale Semiconductor
11