FUNCTIONAL DEVICE OPERATION
OPERATION AND OPERATING MODES
profile. The channel is switched Off when a threshold is
crossed or a window width is exceeded.
Reset of the Duration Counter
Reset of the duration counter is achieved by performing a
delatch sequence (Fault Delatching). In lighting mode
(CONFs = 0), this counter is also reset automatically at each
auto-retry (but not in DC motor mode).
In DC motor mode, only one overcurrent window exists,
defined by only two different thresholds (I_OCH and I_OCL) as
illustrated by Figure 6. This window is opened anytime the
output current exceeds the selected lower overcurrent
threshold (IOCLx). In this case, the allowed overcurrent
In DC motor mode, the duration counter is reset either by
performing a delatch sequence or (automatically) after
occurrence of a new on-period without any overcurrent
([hson[x]=1). Reset then actually occurs at the first turn-off
instant following that on-period.
duration is defined by parameters tOCM1_M, tOCM2_M, tOCH1
and tOCH2
,
.
The selection of the different profiles and values is
explained in the section Address A0100— Overcurrent
protection configuration Register (OCR_s).
In switch mode, the duration counter is not reset by normal
PWM activity unless delatching is performed.
Auto-retry after Overcurrent Shut Off
Severe Short-circuit Fault (latchable fault)
When auto-retry is activated, OC-latching (Overcurrent
Fault (latchable fault)) only occurs after expiration of the
available amount of auto-retries (described in section Auto-
retry).
When a severe short-circuit (SC) is detected at turn-ON
(wiring length LLOAD< LSHORT, see Table 3), the channel is
shut Off immediately. For wiring lengths above LSHORT, the
device is protected from short-circuits by the normal
overcurrent protection functions (Overcurrent Fault (latchable
fault)). When an SC occurs, FSB goes low (logic [0]), and the
SC bit is set, eventually followed by an auto-retry. SC is of the
latchable fault type (see Protection and Diagnostic Features
and Fault Delatching).
Switch Mode Operation and Overcurrent Duration
Switch mode is defined as any device operation with a
duty cycle lower than 100% at a frequency above fPWM_EXT
(min.) or fPWM_INT (min.). The device may operate in Switch
mode in internal/external PWM or in direct input mode. In
switch mode, the accumulated time spent by the load current
in a particular window segment during On-times of
Overvoltage Detection (enabled by default)
By default, the supply overvoltage protection (VPWR) is
enabled when overvoltage occurs (VPWR > VPWR(OV)), the
device turns OFF both channels simultaneously, the FSB pin
is asserted low, and the OV fault bit is set to logic [1]. The
channels remain OFF until the supply voltage drops below a
threshold voltage VPWR < VPWR(OV) - VPWR(OVHYS). The OV
bit can then be reset by reading out the STATR register.
successive switching periods is identified by the
aforementioned duration counter, and compared to the active
segment width. The associated off-times are excluded by the
duration counter. The channel is turned-off when the value of
the counter exceeds the window width. In Figure 14,
overcurrent detection shutdown is shown in case of switch
mode operation with a duty cycle of 50% (solid line) and
100% (fully-on, dashed line). The device is turned off much
later in switch mode than in fully-on mode, since the duration
counter only counts overcurrent during on-times.
The overvoltage protection can be disabled by setting the
OV_dis = 1 in the General Configuration (GCR) register. In
this case, the FSB pin neither asserts a fault occurrence, nor
turn the channels off. However, the fault register (OV bit) still
reports an overvoltage occurrence (when VPWR > VPWR(OV)
)
as a warning. When VPWR > VPWR(OV), the value of the on-
resistance on both channels (RDS(ON)) still lays within the
ranges specified in Table 3.
Undervoltage Fault (Latchable Fault)
The channels are always turned off when the supply
voltage (VPWR) drops below VPWR(UV). FSB drops to logic [0],
and the fault register’s (common) UV bit is set to [1].
When the undervoltage condition then disappears, two
different cases exist:
• If the channel’s internal control signal hson[x] is off, FSB
returns to logic [1], but the UV bit remains set until at least
one output is turned on (warning).
• If the channel’s control signal is on, the channel only turns
on if a delatch or POR sequence is performed prior to the
turn on request. The UV bit can then only be reset by
reading out the STATR register.
Figure 14. Overcurrent shutdown in PWM mode (solid
line) and fully-on mode (dashed line)
Auto-retry (if enabled) starts as soon as the UV condition
disappears.
06XSD200
Analog Integrated Circuit Device Data
Freescale Semiconductor
33