FXO-LC73 Series
Pin Description and Recommended Circuit
Pin #
Name
Type
Logic
Function
E / D 1
1
Enable / Disable Control of Output (0 = Disabled)
NC
No Connection – Leave OPEN
2
3
GND
Output
Output 2
Ground
Output
Output
Power
Electrical Ground for VDD
4
LVDS Oscillator Output
5
Complimentary LVDS Output
Power Supply Source Voltage
2
6
VDD
NOTES:
1
2
Includes pull-up resistor to VDD to provide output when the pin (1) is No Connect.
Installation should include a 0.01µF bypass capacitor placed between VDD
(Pin 6) and GND (Pin 3) to minimize power supply line noise.
E / D
VDD
6
5
4
1
0.01 F
VDD
E/D
N C
# 1
# 2
# 3
# 6
# 5
# 4
NC
Output 2
Output
2
OUTPUT 2
OUTPUT
GND
3
100
GND
Terminations as viewed from the Top
NOTE: XPRESSO LVDS XOs are designed to
fit on Industry Standard, 6 pad layouts
Enable / Disable Control
Pin # 1 (state)
OPEN (No Connection)
Output (Pin # 4, Pin # 5)
ACTIVE Output
“1” Level VIH > 70% VDD
“0” Level VIL < 30% VDD
ACTIVE Output
High Impedance
Soldering Reflow Profile (2 times Maximum at 260°C for 10 seconds MAX)
10 Seconds Max
within 5°C of 260°C peak
t
p
260°C
Ramp-Up
3°C/s Max
Ramp Down
Not to exceed 6°C/s
225°C
180°C
50±10 Seconds
Above 225°C Reflow Area
120 ± 20 Seconds
In Pre-heating Area
160°C
25°C
400 Seconds MAX from +25°C to 260°C peak
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