HcMOS 5x3.2mm 3.3V SMD Oscillator
Model: F530l SERIES
Page 1 of 2
RoHS compliant / Pb Free
Rev. 5/7/2009
FEATuRES
• 3.3V Operation
• Standby Function
• Tape and Reel
(1,000 pcs. STD)
OPTIONS
• 5.0V (F550L) Version Available
XpressO
®
Equivalent
Why XpressO?
Lower Cost, Faster Delivery, Low Jitter!
• PART NuMbER SElEcTION
Part Number
474-Frequency-xxxxx
475-Frequency-xxxxx
476-Frequency-xxxxx
550-Frequency-xxxxx
492-Frequency-xxxxx
636-Frequency-xxxxx
546-Frequency-xxxxx
Model
Number
F530L
F530LR
F535L
F535LR
F536L
F536LR
F538L
Frequency
Operating
Stability
1
Temperature (ºC)
±100PPM
-10 ~ +70
±100PPM
-40 ~ +85
±50PPM
-10 ~ +70
±50PPM
-40 ~ +85
±25PPM
-10 ~ +70
±25PPM*
-40 ~ +85
±20PPM*
-10 ~ +70
Frequency
Range (MHz)
1.544 ~ 155.520
1.544 ~ 155.520
1.544 ~ 155.520
1.544 ~ 155.520
1.544 ~ 155.520
1.544 ~ 155.520
1.544 ~ 77.760
#4
5.0 ± 0.2
#3
Top
View
Dot denotes
pin 1
3.2 ± 0.2
#1
#2
• ElEcTRIcAl cHARAcTERISTIcS
PARAMETERS
Frequency Range (F
O
)
Storage Temperature Range (T
STG
)
Supply Voltage
(V
DD
)
Input Current
(I
DD
)
1.544 ~ 32.000 MHz
32.000+ ~ 50.000 MHz
50.000+ ~ 67.000 MHz
67.000+ ~ 155.520 MHz
Output Symmetry (50% V
DD
)
Rise Time (10% ~ 90% V
DD
) (T
R
)
Fall Time (90% ~ 10% V
DD
) (T
F
)
Output Voltage
(V
OL
)
(V
OH
)
Output Current
(I
OL
)
(I
OH
)
Output Load
(HCMOS)
Standby Current
Start-up Time
(T
S
)
Output Disable Time
2
Output Enable Time
2
Reflow Soldering Temp
Moisture Sensitivity Level (MSL)
Termination Finish
1
1.3 Max
MAX
(unless otherwise noted)
1.544 ~ 155.520 MHz
-55ºC ~ +125ºC
3.3V ± 10%
15mA
20mA
25mA
40mA
40% ~ 60%
7nS
7nS
10% V
DD
90% V
DD
Min
2mA Min
-2mA Min
15pF
10µA
10mS
150nS
10mS
260ºC / 10 Seconds
1
Au
Bottom
View
#4
#3
1.0
2.54±0.1
#1
#2
1.2
Recommended
Solder Pad Layout
2.54
1.29
2.25
1.24
Inclusive of 25ºC tolerance, operating temperature range, input voltage change, load change, aging,
shock, and vibration. *Excludes Shock/Vibration
2
An internal pullup resistor from pin 1 to pin 4 allows active output if pin 1 is left open.
Note: A 0.01µF bypass capacitor should be placed between V
DD
(Pin 4) and GND (Pin 2) to
minimize power supply line noise.
Drawing is for reference to critical specifications defined by size measurements.
Certain non-critical visual attributes, such as side castellations, reference pin shape, etc. may
vary. All specifications subject to change without notice.
Pin Connections
#1 E/D
#2 GND
#3 Output
#4 V
DD
• ENAblE / DISAblE FuNcTION
INH (Pin 1)
OUTPUT (Pin 3)
2
OPEN
ACTIVE
'1' Level V
IH
≥
70% V
DD
ACTIVE
'0' Level V
IL
≤
30% V
DD
High Z
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