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F81867 参数 Datasheet PDF下载

F81867图片预览
型号: F81867
PDF下载: 下载PDF文件 查看货源
内容描述: 6个UART μSuper IO 128字节FIFO和省电功能 [6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions]
分类和应用: 先进先出芯片
文件页数/大小: 315 页 / 2394 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F81867  
Set “1” will assert a left pre-code first when scan code 0 event occurred.  
When multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ  
Pre-code Æ Make/Break code.  
4
GP3_PRE_EN  
R/W 5VSB  
0
The delay time for repeating the make code could be user defined. μC read  
this register to determine the delay time.  
3-2 GP3_DELAY_TIME R/W 5VSB  
0
0
The repeat time for repeating the make code could be user defined. μC read  
this register to determine the delay time.  
0
GP3_REP_TIME  
R/W 5VSB  
GPIO8 Scan Code 4 Control Register Index BCh  
Bit  
7
Name  
R/W Reset Default  
Description  
GP4_CTRL_EN  
GP4_ALT_EN  
GP4_SHIFT_EN  
R/W 5VSB  
R/W 5VSB  
R/W 5VSB  
0
0
0
Set “1” will assert a left “Ctrl” key code first when scan code event occurred.  
Set “1” will assert a left “Alt” key code first when scan code event occurred.  
Set “1” will assert a left “Shift” key code first when scan code event occurred.  
6
5
Set “1” will assert a left pre-code first when scan code 0 event occurred.  
When multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ  
Pre-code Æ Make/Break code.  
4
GP4_PRE_EN  
R/W 5VSB  
0
The delay time for repeating the make code could be user defined. μC read  
this register to determine the delay time.  
3-2 GP4_DELAY_TIME R/W 5VSB  
0
0
The repeat time for repeating the make code could be user defined. μC read  
this register to determine the delay time.  
0
GP4_REP_TIME  
R/W 5VSB  
GPIO8 Scan Code 5 Control Register Index BDh  
Bit  
7
Name  
R/W Reset Default  
Description  
GP5_CTRL_EN  
GP5_ALT_EN  
GP5_SHIFT_EN  
R/W 5VSB  
R/W 5VSB  
R/W 5VSB  
0
0
0
Set “1” will assert a left “Ctrl” key code first when scan code event occurred.  
Set “1” will assert a left “Alt” key code first when scan code event occurred.  
Set “1” will assert a left “Shift” key code first when scan code event occurred.  
6
5
Set “1” will assert a left pre-code first when scan code 0 event occurred.  
When multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ  
Pre-code Æ Make/Break code.  
4
GP5_PRE_EN  
R/W 5VSB  
0
The delay time for repeating the make code could be user defined. μC read  
this register to determine the delay time.  
3-2 GP5_DELAY_TIME R/W 5VSB  
0
0
The repeat time for repeating the make code could be user defined. μC read  
this register to determine the delay time.  
0
GP5_REP_TIME  
R/W 5VSB  
GPIO8 Scan Code 6 Control Register Index BEh  
Bit  
7
Name  
R/W Reset Default  
Description  
GP6_CTRL_EN  
GP6_ALT_EN  
GP6_SHIFT_EN  
R/W 5VSB  
R/W 5VSB  
R/W 5VSB  
0
0
0
Set “1” will assert a left “Ctrl” key code first when scan code event occurred.  
Set “1” will assert a left “Alt” key code first when scan code event occurred.  
Set “1” will assert a left “Shift” key code first when scan code event occurred.  
6
5
Set “1” will assert a left pre-code first when scan code 0 event occurred.  
When multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ  
Pre-code Æ Make/Break code.  
4
GP6_PRE_EN  
R/W 5VSB  
0
The delay time for repeating the make code could be user defined. μC read  
this register to determine the delay time.  
3-2 GP6_DELAY_TIME R/W 5VSB  
GP6_REP_TIME R/W 5VSB  
0
0
The repeat time for repeating the make code could be user defined. μC read  
this register to determine the delay time.  
0
173  
Dec, 2011  
V0.12P  
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