欢迎访问ic37.com |
会员登录 免费注册
发布采购

F81867D 参数 Datasheet PDF下载

F81867D图片预览
型号: F81867D
PDF下载: 下载PDF文件 查看货源
内容描述: 6个UART μSuper IO 128字节FIFO和省电功能 [6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions]
分类和应用: 先进先出芯片
文件页数/大小: 315 页 / 2394 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
 浏览型号F81867D的Datasheet PDF文件第142页浏览型号F81867D的Datasheet PDF文件第143页浏览型号F81867D的Datasheet PDF文件第144页浏览型号F81867D的Datasheet PDF文件第145页浏览型号F81867D的Datasheet PDF文件第147页浏览型号F81867D的Datasheet PDF文件第148页浏览型号F81867D的Datasheet PDF文件第149页浏览型号F81867D的Datasheet PDF文件第150页  
F81867  
0: GPIO00 is input.  
1: GPIO00 is output.  
0
GPIO00_OE  
R/W 5VSB  
0
GPIO0 Output Data Register Index F1h (This byte could be also written by base address + 6)  
Bit  
Name  
R/W Reset Default  
Description  
GPIO07 supports pulse mode.  
When pulse mode is selected, write “1” to this bit will assert a pulse from  
GPIO07. Auto clear when pulse is finished.  
7
6
5
4
GPIO07_VAL  
R/W 5VSB  
R/W 5VSB  
R/W 5VSB  
R/W 5VSB  
0
0
0
0
When level mode is selected, write 0/1 to this bit will set the level of GPIO07.  
0: outputs 0 when in output mode.  
1: outputs 1 when in output mode. GPIO07 will be tri-state if GPIO07_DRV is  
clear to “0”.  
GPIO06 supports pulse mode.  
When pulse mode is selected, write “1” to this bit will assert a pulse from  
GPIO06. Auto clear when pulse is finished.  
GPIO06_VAL  
GPIO05_VAL  
GPIO04_VAL  
When level mode is selected, write 0/1 to this bit will set the level of GPIO06.  
0: outputs 0 when in output mode.  
1: outputs 1 when in output mode. GPIO06 will be tri-state if GPIO06_DRV is  
clear to “0”.  
GPIO05 supports pulse mode.  
When pulse mode is selected, write “1” to this bit will assert a pulse from  
GPIO05. Auto clear when pulse is finished.  
When level mode is selected, write 0/1 to this bit will set the level of GPIO05.  
0: outputs 0 when in output mode.  
1: outputs 1 when in output mode. GPIO05 will be tri-state if GPIO05_DRV is  
clear to “0”.  
GPIO04 supports pulse mode.  
When pulse mode is selected, write “1” to this bit will assert a pulse from  
GPIO04. Auto clear when pulse is finished.  
When level mode is selected, write 0/1 to this bit will set the level of GPIO04.  
0: outputs 0 when in output mode.  
1: outputs 1 when in output mode. GPIO04 will be tri-state if GPIO04_DRV is  
clear to “0”.1: GPIO04 outputs 1 when in output mode.  
0: GPIO03 outputs 0 when in output mode.  
1: GPIO03 outputs 1 when in output mode.  
3
2
1
0
GPIO03_VAL  
GPIO02_VAL  
GPIO01_VAL  
GPIO00_VAL  
R/W 5VSB  
R/W 5VSB  
R/W 5VSB  
R/W 5VSB  
1
1
1
1
0: GPIO02 outputs 0 when in output mode.  
1: GPIO02 outputs 1 when in output mode.  
0: GPIO01 outputs 0 when in output mode.  
1: GPIO01 outputs 1 when in output mode.  
0: GPIO00 outputs 0 when in output mode.  
1: GPIO00 outputs 1 when in output mode.  
GPIO0 Pin Status Register Index F2h (This byte could be also read by base address + 6)  
Bit  
7
Name  
R/W Reset Default  
Description  
The pin status of GPIO07/RTS5#.  
GPIO07_IN  
GPIO06_IN  
GPIO05_IN  
GPIO04_IN  
R
R
R
R
-
-
-
-
-
-
-
-
6
The pin status of GPIO06/SIN5.  
The pin status of GPIO05/SOUT5.  
The pin status of SLP_SUS#/GPIO04.  
5
4
146  
Dec, 2011  
V0.12P  
 复制成功!