F81866A
ECP Test FIFO ⎯ Base + 400h
Bit
Name
R/W Default
Description
Data may be read, written from system to the FIFO in any Direction. But no
hardware handshake occurred on the parallel port lines. It could be used to test
the empty, full and threshold of the FIFO.
7-0
T_FIFO
R/W
00h
It is only valid in ECP and the ECP_MODE is 110b.
ECP Configuration Register A ⎯ Base + 400h
Bit
Name
R/W Default
Description
0: interrupt is ISA pulse.
1: interrupt is ISA level.
7
IRQ_MODE
R
R
0
Only valid in ECP and ECP_MODE is 111b.
000: the design is 16-bit implementation.
001: the design is 8-bit implementation (default).
6-4
IMPID
001 010: the design is 32-bit implementation.
011-111: Reserved.
Only valid in ECP and ECP_MODE is 111b.
3
2
Reserved
-
-
Reserved.
0: when transmitting there is 1 byte waiting in the transceiver that does not
affect the FIFO full condition.
BYTETRAN_N
R
1
1: when transmitting the state of the full bit includes the byte being transmitted.
Only valid in ECP and ECP_MODE is 111b.
Return 00 when read.
1-0
Reserved
R
00
Only valid in ECP and ECP_MODE is 111b.
ECP Configuration Register B ⎯ Base + 401h
Bit
Name
R/W Default
Description
0: only send uncompressed data.
1: compress data before sending.
7
COMP
R
R
0
1
Only valid in ECP and ECP_MODE is 111b.
Reserved. Return 1 when read.
6
Reserved
Only valid in ECP and ECP_MODE is 111b.
000: the interrupt selected with jumper.
001: select IRQ 7 (default).
010: select IRQ 9.
011: select IRQ 10.
5-3
2-0
ECP_IRQ_CH
ECP_DMA_CH
R
R
001 100: select IRQ 11
101: select IRQ 14.
110: select IRQ 15.
111: select IRQ 5.
Only valid in ECP and ECP_MODE is 111b.
Return the DMA channel of ECP parallel port.
Only valid in ECP and ECP_MODE is 111b.
011
31
Jan, 2012
V0. 12P