F81866A
U2
U3
11
10
11
10
P1
P2
-12V
-12V
GND
-12V
GND
-12V
5
9
4
8
3
7
2
6
1
5
9
4
8
3
7
2
6
1
RIN1
12
13
14
15
16
17
18
19
9
8
7
6
5
4
3
2
12
13
14
15
16
17
18
19
9
8
7
6
5
4
3
2
RI1#
RI4#
RY5
DA3
RY4
DA2
DA1
RY3
RY2
RY1
RA5
DY3
RA4
DY2
DY1
RA3
RA2
RA1
RY5
DA3
RY4
DA2
DA1
RY3
RY2
RY1
RA5
DY3
RA4
DY2
DY1
RA3
RA2
RA1
DTR1#
CTS1#
SOUT1
RTS1#
SIN1
DSR1#
DCD1#
DTR4#
CTS4#
SOUT4
RTS4#
SIN4
DSR4#
DCD4#
20
1
UART DB9
20
1
UART DB9
VCC5V
+12V
-12V
VCC5V
+12V
-12V
+5V
+12V
+5V
+12V
GD75323
GD75323
(20-SSOP)
(20-SSOP)
COM1
COM4
U4
U5
11
10
11
10
P3
P4
GND
-12V
GND
-12V
5
9
4
8
3
7
2
6
1
5
9
4
8
3
7
2
6
1
12
13
14
15
16
17
18
19
9
8
7
6
5
4
3
2
12
13
14
15
16
17
18
19
9
8
7
6
5
4
3
2
RI2#
TRK0#/RI5#
WPT#/DTR5#
INDEX#/CTS5#
SOUT5
RTS5#
SIN5
RY5
DA3
RY4
DA2
DA1
RY3
RY2
RY1
RA5
DY3
RA4
DY2
DY1
RA3
RA2
RA1
RY5
DA3
RY4
DA2
DA1
RY3
RY2
RY1
RA5
DY3
RA4
DY2
DY1
RA3
RA2
RA1
DTR2#
CTS2#
SOUT2
RTS2#
SIN2
DSR2#
DCD2#
DSKCHG#/DSR5#
RDATA#/DCD5#
20
1
UART DB9
20
1
UART DB9
VCC5V
+12V
VCC5V
+12V
+5V
+12V
+5V
+12V
GD75323
GD75323
(20-SSOP)
(20-SSOP)
COM2
COM5
U6
U7
11
10
11
10
P5
P6
-12V
-12V
GND
-12V
GND
-12V
5
9
4
8
3
7
2
6
1
5
9
4
8
3
7
2
6
1
12
13
14
15
16
17
18
19
9
8
7
6
5
4
3
2
12
13
14
15
16
17
18
19
9
8
7
6
5
4
3
2
RI3#
DIR#/RI6#
RY5
DA3
RY4
DA2
DA1
RY3
RY2
RY1
RA5
DY3
RA4
DY2
DY1
RA3
RA2
RA1
RY5
DA3
RY4
DA2
DA1
RY3
RY2
RY1
RA5
DY3
RA4
DY2
DY1
RA3
RA2
RA1
DTR3#
CTS3#
SOUT3
RTS3#
SIN3
HDSEL#/DTR6#
STEP#/CTS6#
DRVA#/SOUT6
DENSEL#/RTS6#
MOA#/SIN6
DSR3#
DCD3#
WGATE#/DSR6#
WDATA#/DCD6#
20
1
UART DB9
20
1
UART DB9
VCC5V
+12V
VCC5V
+12V
+5V
+12V
+5V
+12V
GD75323
GD75323
(20-SSOP)
(20-SSOP)
COM3
COM6
VSB3V
R15
8.2K
D4
CHIPSET_RI1#
RIN1
Q1
NPN
R16
4.7K
1N4148
C7
1000P
R17
2.2K
Title
Feature Integration Technology Inc.
Wake up on ring for serial port circuit.
Size
B
Document Number
F81866A
Rev
<Rev Code>
Date:
Friday, October 07, 2011
Sheet
2
of
8
203
Jan, 2012
V0. 12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
