F81866A
7.2.22Multi Function Register Mapping For UART 6
PIN No.
PIN9
PIN FULL NAME
GPIO50/DENSEL#/RTS6#
GPIO51/MOA#/SIN6
PIN SELECT
RTS6#
SIN6
CONFIGURE REGISTER
PIN10
PIN11
PIN12
PIN13
PIN14
PIN15
PIN16
INDEX 27H BIT3-2 = 00
INDEX 28H BIT1-0 = 01 ONLY SIN6/SOUT6
AVAILABLE
GPIO52/DRVA#/SOUT6
GPIO53/WDATA#/DCD6#
GPIO54/DIR#/RI6#
SOUT6
DCD6#
RI6#
INDEX 28H BIT1-0 = 10 ONLY SIN6/SOUT6/RTS6#
AVAILABLE
GPIO55/STEP#/CTS6#
GPIO56/HDSEL#/DTR6#
GPIO57/WGATE#/DSR6#
CTS6#
DTR6#
DSR6#
INDEX 28H BIT1-0 = 11 FULL UART
7.3 FDC Device Configuration Registers (LDN CR00)
“-“ Reserved or Tri-State
Default Value
Register 0x[HEX]
Register Name
FDC Device Enable Register
MSB
LSB
30
60
61
70
74
F0
F2
F4
-
-
0
1
-
-
0
1
-
-
0
1
-
-
0
0
0
-
-
0
0
1
0
1
-
-
1
1
0
0
0
0
1
0
Base Address High Register
Base Address Low Register
IRQ Channel Select Register
DMA Channel Select Register
FDD Mode Register
0
1
-
1
0
1
1
1
1
0
-
-
-
-
-
-
-
0
-
1
-
FDD Drive Type Register
FDD Selection Register
-
-
-
-
-
-
0
0
-
7.3.1FDC Device Enable Register ⎯ Index 30h
Bit
Name
R/W Reset Default
Description
7-1
Reserved
-
-
-
Reserved
0: disable FDC.
1: enable FDC.
LRESET#
0
FDC_EN
R/W
1
7.3.2Base Address High Register ⎯ Index 60h
Bit
Name
BASE_ADDR_HI
R/W Reset Default
03h The MSB of FDC base address.
Description
Description
7-0
R/W LRESET#
7.3.3Base Address Low Register ⎯ Index 61h
Bit
Name
R/W Reset Default
F0h The LSB of FDC base address.
7-0
BASE_ADDR_LO
R/W LRESET#
132
Jan, 2012
V0. 12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
