F81216
4. Pin Description
I/O8t5V-d100 - TTL level bi-directional pin with 8 mA source-sink capability, 5V tolerance, pull-down
100K ohms
I/O12t
I/OD12
PCI5V
OUT12
OD12
INt
- TTL level bi-directional pin with 12 mA source-sink capability
- TTL level bi-directional pin, Open-drain outpu with 12 mA sink capability
- bi-direction pin, slew rate control, 5V tolerance.
- Output pin with 12 mA source-sink capability
- Open-drain output pin with 12 mA sink capability
- TTL level input pin
INt5V
- TTL level input pin and 5V tolerance.
INts
- TTL level input pin and schmitt trigger
INts5V
- TTL level input pin and Schmitt trigger, 5V tolerance.
- Power
P
4.1 ISA/LPC Interface
Pin No. Pin Name
Type
INts
Description
1
2
PCIRST#
System PCI reset active low.
WDT_OUT#
OD12
Watch dog timer output. When pin 24 power on setting
PS_WDT=0(default), Watch Dog timer time interval setting is
programmed by register. Once power on setting PS_WDT=1,
watch dog timer time interval will be fixed to 10 sec.
4~7
LPC_LAD[3:0]
When in LPC mode, these signal lines communicate address,
control, and data information over the LPC bus between a host
and a peripheral.
PCI5V
8
9
LCLK
INts5V
INts5V
In LPC mode, this pin acts as PCI clock input.
FRAME#
In LPC mode, indicates start of a new cycle or termination of a
broken cycle.
10
12
SERIRQ
CLKIN
PCI5V
INt5V
In LPC mode, Serial IRQ input/Output.
Clock Input
-3-
August, 2007
V0.32P