F75909
Icc(H)
Supply current port High side
All port High side static
High
mA
Input and output of port Low side (L1 to L2)
0.7 Vcc(L)
Vcc(L)
VIH
High-level input voltage
Port Low side
V
0.3 Vcc(L)
VIL
IIH
IIL
ILOH
CiO
Low-level input voltage
Input leakage current
Low-level input current
output High leakage current
Input/output capacitance
Port Low side
VI=Vcc(L)
-0.5
V
1
uA
mA
uA
pF
VO=1.1V
15
5
5
Input and output of port High side (H1 to H2)
0.7 Vcc(H)
VIH
VIL
IIH
IIL
ILOH
CiO
High-level input voltage
Low-level input voltage
Input leakage current
Low-level input current
output High leakage current
Input/output capacitance
Port H
Port H
VI=3.6V
VI=0.2V
VO=3.6V
5
V
V
uA
uA
uA
pF
0.3 Vcc(H)
-0.5
1
1
120
Enable
0.7 Vcc(L)
Vcc(H)
VIH
VIL
IIH
IIL
Ci
Low-level input voltage
High-level input voltage
Low-level input current
Input leakage current
Input capacitance
V
V
uA
uA
pF
0.3 Vcc(L)
-0.5
1
1
VI=3.6V or 0V
4
*1 Typical values with Vcc(A)=1.1V, Vcc(B)=3.3V
Dynamic Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Vcc(A) = 1.1V ; Vcc(B) = 3.3V
tPLH
tPHL
tTLH
Low to High propagation delay
High to Low propagation delay
Low to High output transition time Port L
Port H to port L
Port H to port L
*1
*1
*1
1.2
4.9
2.3
ns
ns
ns
tTHL
High to Low output transition time Port L
*1
1.5
4.8
ns
tPLH
tPLH2
Low to High propagation delay
Port L to port H
*1
ns
ns
Low to High propagation delay 2 Port L to port H; measured *1
from the 50% of initial
Low on port L to 1.5V
rising on port H
tPHL
tTLH
tTHL
High to Low propagation delay
Low to High propagation delay
High to Low output transition time Port H
Port L to port H
Port H
*1
*1*2
*1
3.8
2.4
3.9
ns
ns
ns
tsu
Set-up time
EN High before Start
2.7
condition
th
Hold time
En High after Stop
condition
2.7
ns
Vcc(A) = 1.9V ; Vcc(B) = 5.0V
tPLH
tPHL
tTLH
Low to High propagation delay
High to Low propagation delay
Low to High output transition time Port L
Port H to port L
Port H to port L
*1
*1
*1
1
4.4
2
ns
ns
ns
tTHL
tPLH
High to Low output transition time Port L
*1
*1
2
ns
ns
Low to High propagation delay
Port L to port H
2.5
Dec, 2011
V0.12P
4
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
