F75393
The operation of the protocol is described with details in the following sections.
(a) SMBus write to internal address register followed by the data byte
0
7
8
0
7
8
SCL
SDA
1
0
0
1
1
0
0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
Start By
Master
Ack
Ack
by
395
by
Frame 1
Frame 2
395
Serial Bus Address Byte
Internal Index Register Byte
0
7
8
SCL (Continued)
SDA (Continued)
D7
D6
D5
D4
D3
D2
D1
D0
Stop
by
Master
Frame 3
Data Byte
Figure 1. Serial Bus Write to Internal Address Register followed by the Data Byte
(b) Serial bus write to internal address register only
0
1
7
8
0
7
8
SCL
SDA
0
0
1
1
0
0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
Start By
Master
Ack
by
395
Stop by
Master
Ack
by
395
Frame 1
Serial Bus Address Byte
Frame 2
Internal Index Register Byte
0
Figure 2. Serial Bus Write to Internal Address Register Only
(c) Serial bus read from a register with the internal address register prefer to desired location
0
7
8
0
7
8
SCL
SDA
1
0
0
1
1
0
0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
Start By
Master
Ack
by
Master
Ack
by
395
Stop by
Master
Frame 1
Serial Bus Address Byte
Frame 2
Internal Index Register Byte
0
Figure 3. Serial Bus Read from Internal Address Register
(d) Alert Response Address
0
7
8
0
0
7
0
8
SCL
R/W
SDA
0
0
0
1
1
0
0
1
0
0
1
1
0
Start By
Master
Ack
by
Master
Ack
by
395
Stop by
Master
Frame 1
Alert Response Address
Frame 2
Device Address
0
Figure 4. Alert Response Address
The F75393 provides SMBus address option function. Pull high register (Alert Pin) to select SMBus address by power on strapping
and entry key writing. These two conditions must be done both for address selection. If you only option pull high register without
F75393
-4-
May, 2008
V0.16P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
