Feature Integration Technology Inc.
Fintek
F75125
4 Pin Description
P
-
-
-
Power pins
INst
INLV
TTL level input pin with schmitt trigger
Low level input, transient point at 0.9V
I/OD12st5V - TTL level bi-directional pin with schmitt trigger, Open-drain output with 12 mA sink
capability, 5V tolerance
I/OD12st - TTL level bi-directional pin with schmitt trigger, Open-drain output with 12 mA sink
capability.
I/OD12LV
O12
- Low level input, transient point at 0.9V , Open-drain output with 12 mA sink capability
- Output pin with 12mA sink/driving capability.
- Open-Drain output pin with 12mA sink capability.
- Input pin (Analog).
OD12
AIN
AOUT
- Output pin (Analog).
4.1. Power Pin
Pin No.
Pin Name
VSB3V
VDDA
Type
P
Description
3.3V stand by power
VDDA input
4
6
P
8
VDDIO
VSS
P
VDDIO power
Ground
26
P
4.2. North Bridge Voltage Pin/ Voltage Regulator Set Trap Pin
Pin No.
Pin Name
Type
PWR
Description
In PVI output mode, reference voltage output to external
VSB3V
3
VREF_NB
AOUT
single phase PWM to supply VNB
.
Pull high to 3,3VSB before POK, the F75125 will enter SVI
output mode, or the F75125 is set to PVI output mode.
In PVI output mode, NB_EN# is an external single phase
PWM enable signal.
VSB3V
5
NB_EN#/VR_TRAP
O12
V0.16P
8
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
