F75113
6.3 Access Interface
Pin No.
Pin Name
(F75113U)
Description
Type
PWR
LCLK
INst5v
INst5v
INst5v
INst5v
I/OD16st5v
INst5v
INst5v
INst5v
I/O16st5v
O16-5v
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
LPC clock input.
SMBus clock.
SPI clock.
LPC LFRAME# signal.
SMBus data
SPI chip select
LPC reset signal
SPI master output, slave input
LPC LAD signal.
SPI master input, slave output
LPC LAD signal.
46
47
SMBCLK
SPI_CLK
LFRAME#
SMBDAT
SPI_CS#
LRESET#
SPI_MOSI
LAD0
48
01
SPI_MISO
LAD1,
02,03
04
I/O16st5v
VDD
LAD2
LAD3
I/O16st5v
I/OOD16st5v
I/O16st5v
VDD
VDD
VDD
VDD
LPC LAD signal.
General purpose I/O pin.
Serial IRQ input/Output. (for LPC interface)
General purpose I/O pin.
GPIO47
SERIRQ
GPIO46
05
I/OOD16st5v
- 9 -
Dec,2011
V0.13P