F75113
8.2.7 WDT1 Control Register ⎯ Index 08h
Bit
Name
R/W Default
Description
7-3
Reserved
-
-
0
-
Reserved
0b: RSTOUT pulse width for WDT1 is 500usec
1b: RSTOUT pulse width for WDT1 is 100msec
2
1
0
SEL_RSTOUT_PW R/W
Reserved
-
Reserved
WDT1 RSTOUT status.
Write 1 to clear the bit.
WDT1_RST_ST
R
0
8.2.8 WDT1 Count Register ⎯ Index 09h
Bit
Name
R/W Default
Description
0b: Disable WDT1 count.
1b: Enable WDT1 count.
7
WDT1_EN
R/W
R/W
0
0
Watchdog1 timing range from 0 ~ 127sec.
0000000b: 0sec
0000001b: 1sec
…
6-0
WDT1_TIME
1111111b: 127sec
8.2.9 WDT2 Control Register ⎯ Index 0Ah
Bit
Name
R/W Default
Description
Reserved
7-6
Reserved
-
-
WDT2 RSTOUT status.
Write 1 to clear the bit.
5
4
3
2
WDT2_RST_ST
WDT2_EN
R
0
0b: Disable WDT2 count.
1b: Enable WDT2 count.
R/W
R/W
R/W
0
0
0
0b: Level mode
WDT2_PS_EN
WDT2_UNIT
1b: WDT2 pulse mode output enable.
WDT2 unit select. Default 0 is select second. Write 1 to select
minute.
- 25 -
Dec,2011
V0.13P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
