欢迎访问ic37.com |
会员登录 免费注册
发布采购

F71882FG 参数 Datasheet PDF下载

F71882FG图片预览
型号: F71882FG
PDF下载: 下载PDF文件 查看货源
内容描述: 超级硬件监控+ LPC I / O [Super Hardware Monitor + LPC I/O]
分类和应用: 监控PC
文件页数/大小: 130 页 / 2911 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
 浏览型号F71882FG的Datasheet PDF文件第8页浏览型号F71882FG的Datasheet PDF文件第9页浏览型号F71882FG的Datasheet PDF文件第10页浏览型号F71882FG的Datasheet PDF文件第11页浏览型号F71882FG的Datasheet PDF文件第13页浏览型号F71882FG的Datasheet PDF文件第14页浏览型号F71882FG的Datasheet PDF文件第15页浏览型号F71882FG的Datasheet PDF文件第16页  
F71882  
capability.  
O8-u47-5v  
O8  
- Open-drain pin with 8 mA source-sink capability, pull-up 47k ohms, 5V tolerance.  
- Output pin with 8 mA source-sink capability.  
- Output pin with 12 mA source-sink capability.  
- Output pin with 30 mA source-sink capability.  
- Output pin(Analog).  
O12  
O30  
AOUT  
OD12  
OD12-5v  
OD24  
INt5v  
INts  
- Open-drain output pin with 12 mA sink capability.  
- Open-drain output pin with 12 mA sink capability, 5V tolerance.  
- Open-drain output pin with 24 mA sink capability.  
- TTL level input pin,5V tolerance.  
- TTL level input pin and schmitt trigger.  
- TTL level input pin and schmitt trigger, 5V tolerance.  
- Input pin(Analog).  
INts5v  
AIN  
P
- Power.  
6.1 Power Pin  
Pin No.  
Pin Name  
Type  
P
P
P
P
Description  
4,37,99  
68  
86  
88  
VCC  
VSB  
VBAT  
AGND(D-)  
GND  
Power supply voltage input with 3.3V  
Stand-by power supply voltage input 3.3V  
Battery voltage input  
Analog GND  
Digital GND  
20, 48, 73, 117  
P
6.2 LPC Interface  
Pin No.  
Pin Name  
Type  
PWR  
Description  
29  
LRESET#  
INts5v  
VCC  
Reset signal. It can connect to PCIRST# signal on the  
host.  
30  
31  
32  
LDRQ#  
SERIRQ  
LFRAM#  
O12  
I/O12t  
INts  
VCC  
VCC  
VCC  
Encoded DMA Request signal.  
Serial IRQ input/Output.  
Indicates start of a new cycle or termination of a  
broken cycle.  
36-33  
LAD[3:0]  
I/O12t  
VCC  
These signal lines communicate address, control, and  
data information over the LPC bus between a host and  
a peripheral.  
38  
39  
PCICLK  
CLKIN  
INts  
INts  
VCC  
VCC  
33MHz PCI clock input.  
System clock input. According to the input frequency  
24/48MHz.  
6.3 FDC  
Pin No.  
Pin Name  
Type  
PWR  
Description  
7
OD24  
VCC  
Drive Density Select.  
DENSEL#  
Set to 1 - High data rate.(500Kbps, 1Mbps)  
Set to 0 – Low data rate. (250Kbps, 300Kbps)  
Motor A On. When set to 0, this pin enables disk drive  
0. This is an open drain output.  
8
OD24  
VCC  
MOA#  
-6-  
May, 2008  
V0.28P