F71872
Bit
Name
R/W Default
Description
7-0 T1_SP_1_LSB
R/W FFh The LSB of 1st expected fan speed for FAN1 in temperature mode.
FAN1 SEGMENT 5 SPEED COUNT (MSB) – Index A6h
Bit
Name
R/W Default
Description
7-4 Reserved
3-0 T1_SP_5_MSB
-
0Fh
R/W
The MSB of 5th expected fan speed for FAN1 in temperature mode.
FAN1 SEGMENT 5 SPEED COUNT (LSB) – Index A7h
Bit
Name
R/W Default
Description
7-0 T1_SP_5_LSB
R/W FFh The LSB of 5th expected fan speed for FAN1 in temperature mode.
FAN1 SEGMENT 9 SPEED COUNT (MSB) – Index A8h
Bit
Name
R/W Default
Description
7-4 Reserved
3-0 T1_SP_9_MSB
-
0Fh
R/W
The MSB of 9th expected fan speed for FAN1 in temperature mode.
FAN1 SEGMENT 9 SPEED COUNT (LSB) – Index A9h
Bit
Name
R/W Default
Description
7-0 T1_SP_9_LSB
R/W FFh The LSB of 9th expected fan speed for FAN1 in temperature mode.
7.6.3.59 FAN2 CONTROL v.s. TEMPERATURE 2 (INDEX B0 -- BD registers )
T2 BOUNDARY 1 TEMPERATURE – Index B0h
Bit
Name
R/W Default
R/W
Description
7-0 T2_TP_1
00h The 1st BOUNDARY temperature for T2 in temperature mode.
When T2 temperature is exceed this boundary, FAN2 segment 1 speed count
registers will be loaded into FAN2 expect count registers.
When T2 temperature is below this boundary, FAN2 segment 2 speed count
registers will be loaded into FAN2 expect count registers.
T2 BOUNDARY 5 TEMPERATURE – Index B1h
Bit
Name
R/W Default
Description
7-0 T2_TP_5
R/W 002h The 5th BOUNDARY temperature for T2 in temperature mode.
When T2 temperature is exceed this boundary, FAN2 segment 5 speed
count registers will be loaded into FAN2 expect count registers.
When T2 temperature is below this boundary, FAN2 segment 6 speed
count registers will be loaded into FAN2 expect count registers.
85
July, 2007
V0.28P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
