F71862
R
R
R
R
R
R
R
R
-------------------------- PCN ( Drive 0 ) ------------------------
-------------------------- PCN ( Drive 0 ) ------------------------
|------------------ SRT -------------------|
|------------------ HUT -------------------|
|------------------------------------- SRT ---------------------------------------|
-------------------------- SC/EOT ------------------------
ND
LOCK
0
0
D3
D2
D1
D0
GAP
WGATE
EIS
EFIFO
POLL
|---------------- FIFOTHR ---------------|
---------------------------- PRETRK --------------------------
Sense Drive Status
Phase
R/W
D7
D6
D5
D4
D3
D2
D1
D0
Remark
Command
W
0
0
0
0
0
1
0
0
Command code
W
R
0
0
0
0
0
HDS
DS1
DS0
Result
---------------------------- ST3 --------------------------
Status information
abut disk drive
Invalid
Phase
R/W
D7
D6
D5
D4
D3
D2
D1
D0
Remark
Command
Result
W
---------------------------- Invalid Codes --------------------------
---------------------------- ST0 --------------------------
FDC goes to
standby state.
R
ST0 = 80h
7.3 UART
The F71862 provides two UART ports and supports IRQ sharing for system
application. The UARTs are used to convert data between parallel format and serial format.
They convert parallel data into serial format on transmission and serial format into parallel
data on receiver side. The serial format is formed by one start bit, followed by five to eight
data bits, a parity bit if programmed and one ( 1.5 or 2 ) stop bits. The UARTs include
complete modem control capability and an interrupt system that may be software trailed to
the computing time required to handle the communication link. They have FIFO mode to
reduce the number of interrupts presented to the host. Both receiver and transmitter have a
16-byte FIFO.
The below content is about the UART1 and UART2 device register descriptions. All
the registers are for software porting reference.
32
July, 2008
V.28P