VBAT
F71862
R17
2M
SW1
2
1
COPEN#
C31
D1+
D-
THERMDA
THERMDC
1000P
from CPU
C30 3300P
R18
R19
1K
VCORE
VIN2
CASE OPEN CIRCUIT
VCORE
VRAM
D2+
10K
Q1
PNP
for
SYSTEM
C32 3300P
C33 3300P
3906
D-
R20 10K
R21
R23
R26
4.7K
20K
VIN3
VIN4
VIN5
VIN6
VCHIPSET
D3+
Q2
VCC3V
VCC3V
PNP
for
SYSTEM
R22
10K
3906
R25
4.7K
R27
4.7K
R28
4.7K
D-
VCC5V
+12V
U4
VCC3V
1
2
3
4
8
7
6
5
DIODE SENSING CIRCUIT
SPI_CS0#
MISO
S#
VCC
HOLD#
C
R24 4.7K
R29
200K
Q
SCK
W#
MOSI
VSS
D
20K
RT1
10K 1%
(for system)
R30 10K 1%
SPI FLASH MEMORY
VREF
R31
10K
THERMISTOR
D1+
VCC1.5V
RT2
10K 1%
R32 10K 1%
R33 10K 1%
VREF
D2+
(for system)
(for system)
THERMISTOR
VOLTAGE SENSING.
The best voltage input level is about 1V.
R94
R95
0
0
RT3
10K 1%
CHIPSET_PWROK
CHIPSET_RESET
VREF
D3+
THERMISTOR
C34
1uF
Q3
MOSFET N
*VCORE VIN2 VIN3 VIN4 internal pull-down 225K ohm
FWH_DIS
THERMISTOR SENSING CIRCUIT
R34
100K
Temperature Sensing
VCC3V
BACK_UP BIOS RESET CIRCUIT
VSB5V
VSB5V
R35
4.7K
VSB3V
VSB3V
R37
4.7K
R39
4.7K
R36
4.7K
R38
4.7K
PLED
SUSLED
OVT#
Q13
Q14
LED_VCC
LED_VSB
OVT Pull-up
Title
Feature Integration Technology Inc
Size
B
Document Number
Rev
0.11
Hardware Monitor, SPI Flash
Date:
Friday , May 02, 2008
Sheet
3
of
7
106
July, 2008
V.28P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
