F71869A
The meaning of this register is depending on the
FAN1_MODE(CR96)
2’b00: The value that set in this byte is the relative expect fan speed
% of the full speed in this temperature section.
2’b01: The value that set in this byte is mean the expect PWM
duty-cycle in this temperature section.
99h
(60%)
7-0
SEC4SPEED1
6.6.74 FAN1 SEGMENT 5 SPEED COUNT Register – Index AEh
Bit
Name
R/W Default
Description
The meaning of this register is depending on the
FAN1_MODE(CR96)
80h
R/W (50%)
2’b00: The value that set in this byte is the relative expect fan speed
% of the full speed in this temperature section.
2’b01: The value that set in this byte is mean the expect PWM
duty-cycle in this temperature section.
7-0
SEC5PEED1
6.6.75 FAN1 Temperature Mapping Select – Index AFh
Bit
Name
R/W Default
Description
This bit companies with FAN1_TEMP_SEL select the temperature
source for controlling FAN1.
FAN1_TEMP
_SEL_DIG
7
R/W
0
Set this bit to select FAN2 PWM output frequency.
FAN1_PWM
_FREQ_SEL
6
5
4
R/W
0
0
1
0: 23.5 kHz
1: 220 Hz
FAN1_UP_T_EN R/W
Set 1 to force FAN1 to full speed if any temperature over its high limit.
FAN1_
INTERPOLATION_ R/W
EN
Set 1 will enable the interpolation of the fan expect table.
This register controls the FAN1 duty movement when temperature over
highest boundary.
0: The FAN1 duty will increases with the slope selected by
FAN1_RATE_SEL register.
FAN1_JUMP
R/W
_HIGH_EN
3
1
1: The FAN1 duty will directly jumps to the value of SEC1SPEED1
register.
This bit only activates in duty mode.
97
Oct., 2011
V0.19P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
