F71869A
When GPIO13 is in input mode, set this bit to select which input event
should be detected.
0: rising edge
1: falling edge
3
2
1
0
GPIO13_DET_SEL R/W
GPIO12_DET_SEL R/W
GPIO11_DET_SEL R/W
GPIO10_DET_SEL R/W
0
0
0
0
When GPIO12 is in input mode, set this bit to select which input event
should be detected.
0: rising edge
1: falling edge
When GPIO11 is in input mode, set this bit to select which input event
should be detected.
0: rising edge
1: falling edge
When GPIO10 is in input mode, set this bit to select which input event
should be detected.
0: rising edge
1: falling edge
6.8.15 GPIO1 Event Status Register ⎯ Index E6h
Bit
Name
R/W Default
Description
When GPIO17 is in input mode and a GPIO17 input is detected
according to CRE5[7], this bit will be set to 1. Write a 1 to this bit will
clear it to 0.
GPIO17_
EVENT_STS
7
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
When GPIO16 is in input mode and a GPIO16 input is detected
according to CRE5[6], this bit will be set to 1. Write a 1 to this bit will
clear it to 0.
GPIO16_
EVENT_STS
6
5
4
3
2
1
0
When GPIO15 is in input mode and a GPIO15 input is detected
according to CRE5[5], this bit will be set to 1. Write a 1 to this bit will
clear it to 0.
GPIO15_
EVENT_STS
When GPIO14 is in input mode and a GPIO14 input is detected
according to CRE5[4], this bit will be set to 1. Write a 1 to this bit will
clear it to 0.
GPIO14_
EVENT_STS
When GPIO13 is in input mode and a GPIO13 input is detected
according to CRE5[3], this bit will be set to 1. Write a 1 to this bit will
clear it to 0.
GPIO13_
EVENT_STS
When GPIO12 is in input mode and a GPIO12 input is detected
according to CRE5[2], this bit will be set to 1. Write a 1 to this bit will
clear it to 0.
GPIO12_
EVENT_STS
When GPIO11 is in input mode and a GPIO11 input is detected
according to CRE5[1], this bit will be set to 1. Write a 1 to this bit will
clear it to 0.
GPIO11_
EVENT_STS
When GPIO10 is in input mode and a GPIO10 input is detected
according to CRE5[0], this bit will be set to 1. Write a 1 to this bit will
clear it to 0.
GPIO10_
EVENT_STS
6.8.16 GPIO2 Output Enable Register ⎯ Index D0h
Bit
Name
R/W Default
Description
0: GPIO27 is in input mode.
1: GPIO27 is in output mode.
7
GPIO27_OE
R/W
0
116
Oct., 2011
V0.19P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
