MC81F4x16
BIT manipulation
FLAG
OP
CODE
BYTE
NO
CYCLE
NO
NO.
MNEMONIC
OPERATION
NVGBHIZC
1
2
AND1 M.bit
8B
8B
3
3
4
4
Bit AND C-flag : C ( C ) ∧ ( M.bit )
-------C
-------C
Bit AND C-flag and NOT :
C ( C ) ∧ ~( M.bit )
AND1B M.bit
3
BIT dp
0C
1C
y1
2
3
2
2
1
1
1
3
4
5
4
2
2
2
2
5
Bit test A with memory :
Z ( A ) ∧ ( M ), N ( M7 ), V ( M6 )
MM----Z-
4
BIT !abs
CLR1 dp.bit
CLRA1 A.bit
CLRC
5
--------
--------
-------0
--0-----
-0--0---
-------C
Clear bit : ( M.bit ) “0”
6
2B
20
40
80
AB
Clear A bit : ( A.bit ) “0”
Clear C-flag : C “0”
7
8
CLRG
Clear G-flag : G “0”
9
CLRV
Clear V-flag : V “0”
10
EOR1 M.bit
Bit exclusive-OR C-flag : C ( C ) ( M.bit )
Bit exclusive-OR C-flag and NOT :
C ( C ) ~( M.bit )
11
EOR1B M.bit
AB
3
5
-------C
12
13
14
15
16
17
18
19
20
21
LDC M.bit
LDCB M.bit
NOT1 M.bit
OR1 M.bit
OR1B M.bit
SET1 dp.bit
SETA1 A.bit
SETC
CB
CB
4B
6B
6B
x1
3
3
3
3
3
2
2
1
1
3
4
4
5
5
5
4
2
2
2
6
-------C
-------C
--------
-------C
-------C
--------
--------
-------1
--1-----
--------
Load C-flag : C ( M.bit )
Load C-flag with NOT : C ~( M.bit )
Bit complement : ( M.bit ) ~( M.bit )
Bit OR C-flag : C C ∨ ( M.bit )
Bit OR C-flag and NOT : C C ∨ ~ ( M.bit )
Set bit : ( M.bit ) “1”
0B
A0
C0
EB
Set A bit : ( A.bit ) “1”
Set C-flag : C “1”
SETG
Set G-flag : G “1”
STC M.bit
Store C-flag : ( M.bit ) C
Test and clear bits with A :
A – ( M ), ( M ) ( M ) ∧ ~( A )
22
23
TCLR1 !abs
TSET1 !abs
5C
3C
3
3
6
6
N-----Z-
N-----Z-
Test and set bits with A :
A – ( M ), ( M ) ( M ) ∨ ( A )
196
October 19, 2009 Ver.1.35
FINECHIPS [ FINECHIPS ]
