MC81F4432
30.3 Instruction Set
Arithmetic / Logic
FLAG
OP
CODE
BYTE
NO
CYCLE
NO
NO.
MNEMONIC
OPERATION
NVGBHIZC
1
ADC #imm
ADC dp
04
05
06
07
15
16
17
14
84
85
86
87
95
96
97
94
08
09
19
18
44
45
46
47
55
56
2
2
2
3
3
2
2
1
2
2
2
3
3
2
2
1
1
2
2
3
2
2
2
3
3
2
2
3
4
4
5
6
6
3
2
3
4
4
5
6
6
3
2
4
5
5
2
3
4
4
5
6
2
3
ADC dp + X
ADC !abs
4
Add with carry.
NV--H-ZC
A ( A ) + ( M ) + C
5
ADC !abs + Y
ADC [ dp + X ]
ADC [ dp ] + Y
ADC { X }
6
7
8
9
AND #imm
AND dp
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
AND dp + X
AND !abs
Logical AND
N-----Z-
A ( A ) ∧ ( M )
AND !abs + Y
AND [ dp + X ]
AND [ dp ] + Y
AND { X }
ASL A
Arithmetic shift left
ASL dp
N-----ZC
C
7 6 5 4 3 2 1 0
“0”
ASL dp + X
ASL !abs
CMP #imm
CMP dp
CMP dp + X
CMP !abs
Compare accumulator contents with memory
contents
N-----ZC
( A ) - ( M )
CMP !abs + Y
CMP [ dp + X ]
October 19, 2009 Ver.1.35
189
FINECHIPS [ FINECHIPS ]
