MC81F4432
17.1 Registers
WTSCR
WATCH TIMER STATUS AND CONTROL REGISTER
00F0H
7
6
5
4
3
2
1
0
–
WTEN
WTSS
–
–
WTCS
WTSCR
Reset value: 00H
–
R/W
R/W
R/W
R/W
–
–
R/W
A reset clears WTSCR register to „00H‟. This disables the watch timer. So, if you want to use the
watch timer, you must write appropriate value to WTSCR register.
When the watch timer interrupt sub-routine is serviced, the watch timer interrupt request flag bit,
WTIR is automatically cleared.
–
bit7
Not used for MC81F4x32
0:Disable watch timer; Clear frequency
Dividing circuits
WTEN
Watch Timer Enable Bit
1: Enable watch timer
000: Set watch timer interrupt to 60.0s
001: Set watch timer interrupt to 30.0s
010: Not available
011: Not available
WTSS
Watch Timer Speed Selection Bits
100: Set watch timer interrupt to 1.0s
101: Set watch timer interrupt to 0.5s
110: Set watch timer interrupt to 0.25s
111: 1/100s stop watch for real timer
Not used for MC81F4x32
–
bit2 – bit1
0: Select main clock divided by 27 (fx/128)
WTCS
Watch Timer Clock Selection Bit
1: Select sub clock (fxt)
Note: Main system clock frequency (fx) is assumed to be 4.19 MHz.
October 19, 2009 Ver.1.35
111
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