MC81F4x16
19.3 Timer 3 8-Bit Mode
T3CS
T3OVIE
fxx/2048
fxx/512
fxx/128
fxx/32
fxx/16
fxx/8
Timer 3 overflow INT enable
Data BUS
8
OVF
T3OVIR
M
U
X
T3 Overflow
Interrupt
Timer 3 Overflow INT request
T3OVIF
fxx/4
fxx/2
fxt
8-Bit Up Counter
(Read - only)
Clear
T3CC
Match signal
R
Clear
T3CR
Counter stop
T3MIE
Timer 3 INT enable
Match
8-Bit Comparator
T3MIR
T3 Match
Interrupt
Timer 3 Match INT request
M
U
X
T3MIF
EXT6
Timer 3 Buffer Register
Timer 3 Data Register
T3CC
Overflow signal
Match signal
EINT1
T3DR
8
EXT6
Interrupt
Data BUS
Figure 19-2 8-bit Timer 3 Block Diagram
Timer 3 has the following functional components:
-
-
-
-
-
Clock frequency divider (fxx divided by 2048, 512, 128, 32, 16, 8, 4, 2, fxt) with multiplexer
I/O pins for capture input, EXT6 (R10)
8-bit counter (T3CR), 8-bit comparator, and 8-bit reference data register (T3DR)
Timer 3 status and control register (T3SCR)
Timer 3 overflow interrupt and match interrupt generation
October 19, 2009 Ver.1.35
133
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