MC81F4x16
27.3 Sleep vs Stop
Peripheral
STOP
STOP
SLEEP Mode
in Main OSC
in SUB OSC
CPU
Stop
Stop
RAM
Retain
Retain
Retain
Retain
Retain
Retain
Retain
Retain
I/O Ports
Control Registers
Address Data Bus
ADC
Stop
Stop
Operate
Operate
Operate
Operate
Usart
SIO
Only operated with external clock
Operate
IIC Slave
Basic Interval Timer
Watchdog Timer
Stop
Stop
Operate
Operate
Watch Timer
with System clock
Stop
Stop
Stop
Operate
Operate
Operate
Operate
Operate
Operate
Timer/Counter with System clock
Buzzer
with System clock
with Sub clock
Watch Timer
Operate
Operate
Operate
Stop
Stop
Stop
Timer/Counter with Sub clock
Buzzer
with Sub clock
Main Oscillator
Sub Oscillator
Stop
Oscillation
Stop
Oscillation
Oscillation
Oscillation
Release Source
Reset, Timer(0,1,2,3)
Reset, All Interrupts
,Watch Timer(with Sub clock)
, SIO, USART, IIC Slave
,External Interrupt
Table 27-1 Peripheral Operation During Power Saving Mode
Note:
In the stop mode, system clock source is stopped. But unselected clock source is not
stopped.
For example, when main oscillator is selected as the system clock and the stop instruction is
executed, main oscillator is stopped, but sub oscillator is not stopped. (assume that, both
oscillator are working before stop instruction) In this case, the watch timer can be operated
with sub oscillator.
October 19, 2009 Ver.1.35
177
FINECHIPS [ FINECHIPS ]
