FM25Q64ꢀ
ꢀ
11.2.30ꢀWriteꢀSecurityꢀRegisterꢀ(2Fh)ꢀ
TheꢀWriteꢀSecurityꢀRegisterꢀinstructionꢀisꢀforꢀchangingꢀtheꢀvaluesꢀofꢀSecurityꢀRegisterꢀbits.ꢀUnlikeꢀ
WriteꢀStatusꢀRegister,ꢀtheꢀWRENꢀinstructionꢀisꢀnotꢀrequiredꢀbeforeꢀwritingꢀWRSCURꢀinstruction.ꢀ
TheꢀWRSCURꢀinstructionꢀmayꢀchangeꢀtheꢀvalueꢀofꢀbit1ꢀ(LDSOꢀbit)ꢀforꢀcustomerꢀtoꢀlockꢁdownꢀtheꢀ
4Kꢁbitꢀ Securedꢀ OTPꢀ area.ꢀ Onceꢀ theꢀ LDSOꢀ bitꢀ isꢀ setꢀ toꢀ “1”,ꢀ theꢀ Securedꢀ OTPꢀ areaꢀ cannotꢀ beꢀ
updatedꢀanyꢀmore.ꢀ
ꢀ
Theꢀ/CSꢀmustꢀgoꢀhighꢀexactlyꢀatꢀtheꢀboundary;ꢀotherwise,ꢀtheꢀinstructionꢀwillꢀbeꢀrejectedꢀandꢀnotꢀ
executed.ꢀ
ꢀ
/ CS
Modeꢀ 3
Modeꢀ 0
Modeꢀ 3
Modeꢀ 0
0
1
2
3
4
5
6
7
CLK
Instructionꢀ (2 Fh )
HighꢀImpedance
DI
DO
ꢀ
Figureꢀ30.ꢀWriteꢀSecurityꢀRegisterꢀinstructionꢀsequenceꢀ
ꢀ
ꢀ
11.2.31ꢀ4KꢁbitꢀSecuredꢀOTPꢀ
It’sꢀforꢀuniqueꢀidentifierꢀtoꢀprovideꢀ4Kꢁbitꢀoneꢁtimeꢁprogramꢀareaꢀforꢀsettingꢀdeviceꢀuniqueꢀserialꢀ
numberꢀwhichꢀmayꢀbeꢀsetꢀbyꢀfactoryꢀorꢀsystemꢀcustomer.ꢀPleaseꢀreferꢀtoꢀtableꢀofꢀ“4Kꢁbitꢀsecuredꢀ
OTPꢀdefinition”.ꢀ
ꢀ
ꢀ ꢁꢀSecurityꢀregisterꢀbitꢀ0ꢀindicatesꢀwhetherꢀtheꢀchipꢀisꢀlockedꢀbyꢀfactoryꢀorꢀnot.ꢀ
ꢀ ꢁꢀ Toꢀ programꢀ theꢀ 4Kꢁbitꢀ securedꢀ OTPꢀ byꢀ enteringꢀ 4Kꢁbitꢀ securedꢀ OTPꢀ modeꢀ (withꢀ ENSOꢀ
command)ꢀandꢀgoingꢀthroughꢀnormalꢀprogramꢀprocedure,ꢀandꢀthenꢀexitingꢀ4KꢁbitꢀsecuredꢀOTPꢀ
modeꢀbyꢀwritingꢀEXSOꢀcommandꢀ
ꢀ ꢁꢀ Customerꢀmayꢀlockꢁdownꢀbit1ꢀ asꢀ “1”.ꢀ Pleaseꢀ referꢀ toꢀ “tableꢀ ofꢀ securityꢀ registerꢀ definition”ꢀ forꢀ
securityꢀ registerꢀ bitꢀ definitionꢀandꢀtableꢀofꢀ “4KꢁbitꢀsecuredꢀOTPꢀ definition”ꢀ forꢀ addressꢀ rangeꢀ
definition.ꢀ
ꢀ ꢁꢀNote.ꢀOnceꢀlockꢁdownꢀwhateverꢀbyꢀfactoryꢀorꢀcustomer,ꢀitꢀcannotꢀbeꢀchangedꢀanyꢀmore.ꢀWhileꢀ
inꢀ4KꢁbitꢀsecuredꢀOTPꢀmode,ꢀarrayꢀaccessꢀisꢀnotꢀallowedꢀtoꢀwrite.ꢀ
ꢀ
ꢀ
ꢀ ꢀ 4KꢁbitꢀsecuredꢀOTPꢀdefinitionꢀ
Standardꢀ
FactoryꢀLockꢀ
Addressꢀrangeꢀ
Sizeꢀ
CustomerꢀLockꢀ
ESNꢀ
(ElectricalꢀSerialꢀNumber)ꢀ
N/Aꢀ
000000ꢀ~ꢀ00000Fꢀ
000010ꢀ~ꢀ0001FFꢀ
128ꢁbitꢀ
Determinedꢀbyꢀcustomerꢀ
3968ꢁbitꢀ
ꢀ
ꢀ
ꢀ
preliminary(Aug.18.2010)ꢀ ꢀ ꢀ ꢀ
47ꢀ
FIDELIX [ FIDELIX ]
