FM25Q64ꢀ
instructionꢀisꢀtheꢀsameꢀasꢀpreviouslyꢀdescribed,ꢀandꢀshownꢀinꢀfigureꢀ23b,ꢀexceptꢀthatꢀafterꢀ/CSꢀisꢀ
drivenꢀhighꢀitꢀmustꢀremainꢀhighꢀforꢀaꢀtimeꢀdurationꢀofꢀtRES2ꢀ(SeeꢀACꢀCharacteristics).ꢀAfterꢀthisꢀ
timeꢀdurationꢀtheꢀdeviceꢀwillꢀresumeꢀnormalꢀoperationꢀandꢀotherꢀinstructionsꢀwillꢀbeꢀaccepted.ꢀIfꢀ ꢀ
theꢀReleaseꢀfromꢀpowerꢁdownꢀ/DeviceꢀIDꢀinstructionꢀisꢀissuedꢀwhileꢀanꢀErase,ꢀProgramꢀorꢀWriteꢀ
cycleꢀisꢀinꢀprocessꢀ(whenꢀBUSYꢀequalsꢀ1)ꢀtheꢀinstructionꢀisꢀignoredꢀandꢀwillꢀnotꢀhaveꢀanyꢀeffectsꢀ
onꢀtheꢀcurrentꢀcycle.ꢀ
ꢀ
/CS
tRES1
Modeꢀ3
Modeꢀ3
Modeꢀ0
0
1
2
3
4
5
6
7
CLK
DI
Modeꢀ0
Instructionꢀ(ABh)
HighꢀImpedance
DO
StandꢁbyꢀCurrent
PowerꢀDownꢀCurrent
ꢀ
ꢀ
Figureꢀ23a.ꢀReleaseꢀpowerꢁdownꢀInstructionꢀSequenceꢀ
ꢀ
ꢀ
ꢀ
/CS
Modeꢀ3
Modeꢀ0
Modeꢀ3
0
1
2
3
4
5
6
7
8
9
10
28 29 30 31 32 33 34 35 36 37 38
CLK
DI
Modeꢀ0
tRES2
Instructionꢀ(ABh)
3ꢀDummyꢀBytes
2
22 21
3
1
0
23
*
DeviceꢀID
**
HighꢀImpedance
2
7
6
5
4
3
1
0
*
StandꢁbyꢀCurrent
PowerꢀDownꢀCurrent
=ꢀMSB
*
**
ꢀ
ꢀ
Figureꢀ23b.ꢀReleaseꢀpowerꢁdownꢀ/ꢀDeviceꢀIDꢀInstructionꢀSequenceꢀDiagramꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
preliminary(Aug.18.2010)ꢀ ꢀ ꢀ ꢀ
39ꢀ