FM25Q64ꢀ
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11.2.10ꢀFastꢀReadꢀ(0Bh)ꢀ
TheꢀFastꢀReadꢀinstructionꢀisꢀsimilarꢀtoꢀtheꢀReadꢀDataꢀinstructionꢀexceptꢀthatꢀitꢀcanꢀoperateꢀatꢀtheꢀ
highestꢀ possibleꢀ frequencyꢀ ofꢀ FRꢀ (seeꢀ ACꢀ Electricalꢀ Characteristics).ꢀ Thisꢀ isꢀ accomplishedꢀ byꢀ
addingꢀeightꢀ“dummy”ꢀclocksꢀafterꢀtheꢀ24ꢁbitꢀaddressꢀasꢀshownꢀinꢀfigureꢀ10.ꢀTheꢀdummyꢀclocksꢀ
allowꢀ theꢀ device’sꢀ internalꢀ circuitsꢀ additionalꢀ timeꢀ forꢀ settingꢀ upꢀ theꢀ initialꢀ address.ꢀ Duringꢀ theꢀ
dummyꢀclocks,ꢀTheꢀdataꢀvalueꢀonꢀtheꢀDOꢀpinꢀisꢀaꢀ“don’tꢀcare”.ꢀ
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/CS
Modeꢀ3
Modeꢀ0
0
1
2
3
4
5
6
7
8
9
10
28 29 30 31
CLK
24ꢁBitꢀAddress
Instructionꢀ(0Bh)
23 22 21
3
2
1
0
DI
DO
/CS
32 33 34 35 36 37 38 39
DummyꢀByte
43
46 47
44 45
40 41 42
CLK
DI
2
7
6
5
4
3
1
0
DataꢀOutꢀ1
DataꢀOutꢀ2
2
7
6
5
4
3
1
0
7
6
5
4
3
2
1
0
7
DO
=MSB
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Figureꢀ10.ꢀFastꢀReadꢀRegisterꢀInstructionꢀSequenceꢀDiagramꢀ
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preliminary(Aug.18.2010)ꢀ ꢀ ꢀ ꢀ
24ꢀ
FIDELIX [ FIDELIX ]
