June 1999
NDS9407
Single P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy
pulses in the avalanche and commutation modes. These
devices are particularly suited for low voltage applications
such as notebook computer power management and other
battery powered circuits where fast switching, low in-line
power loss, and resistance to transients are needed.
Features
-3.0A, -60V. R
DS(ON)
= 0.15
Ω
@ V
GS
=-10V
R
DS(ON)
= 0.24
Ω
@ V
GS
=-4.5V.
High density cell design for extremely low R
DS(ON)
.
High power and current handling capability in a widely used
surface mount package.
_______________________________________________________________________________________
5
6
7
8
4
3
2
1
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
T
A
= 25°C unless otherwise noted
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
T
A
= 25°C
T
A
= 70°C
T
A
= 25°C
(Note 1a)
(Note 1b)
(Note 1c)
(Note 1a)
NDS9407
-60
± 20
± 3.0
± 2.4
± 12
2.5
1.2
1
-55 to 150
Units
V
V
A
- Continuous
- Pulsed
P
D
Maximum Power Dissipation
W
T
J
,T
STG
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS
R
θ
JA
R
θ
J C
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
50
25
°C/W
°C/W
©1999 Fairchild Semiconductor Corporation
NDS9407.SAM Rev. B
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
