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NC7SZ74K8X_NL 参数 Datasheet PDF下载

NC7SZ74K8X_NL图片预览
型号: NC7SZ74K8X_NL
PDF下载: 下载PDF文件 查看货源
内容描述: [D Flip-Flop, LVC/LCX/Z Series, 1-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO8, 3.10 MM, MO-187CA, US-8]
分类和应用: 光电二极管逻辑集成电路触发器
文件页数/大小: 9 页 / 210 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
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NC7SZ74
AC Electrical Characteristics
Symbol
f
MAX
Parameter
Maximum Clock
Frequency
V
CC
(V)
1.8
±
0.15
2.5
±
0.2
3.3
±
0.3
5.0
±
0.5
3.3
±
0.3
5.0
±
0.5
t
PLH
t
PHL
Propagation Delay
CK to Q, Q
1.8
±
0.15
2.5
±
0.2
3.3
±
0.3
5.0
±
0.5
3.3
±
0.3
5.0
±
0.5
t
PLH
t
PHL
Propagation Delay
CLR, PR, to Q, Q
1.8
±
0.15
2.5
±
0.2
3.3
±
0.3
5.0
±
0.5
3.3
±
0.3
5.0
±
0.5
t
S
Setup Time,
CK to D
1.8
±
0.15
2.5
±
0.2
3.3
±
0.3
5.0
±
0.5
3.3
±
0.3
5.0
±
0.5
t
H
Hold Time,
CK to D
1.8
±
0.15
2.5
±
0.2
3.3
±
0.3
5.0
±
0.5
3.3
±
0.3
5.0
±
0.5
t
W
Pulse Width,
CK, PR, CLR
1.8
±
0.15
2.5
±
0.2
3.3
±
0.3
5.0
±
0.5
3.3
±
0.3
5.0
±
0.5
t
REC
Recover Time
CLR, PR to CK
1.8
±
0.15
2.5
±
0.2
3.3
±
0.3
5.0
±
0.5
3.3
±
0.3
5.0
±
0.5
T
A
= +25°C
Min
75
150
200
250
175
200
2.5
1.5
1.0
0.8
1.0
1.0
2.5
1.5
1.0
0.8
1.0
1.0
6.5
3.5
2.0
1.5
2.0
1.5
0.5
0.5
0.5
0.5
0.5
0.5
6.0
4.0
3.0
2.0
3.0
2.0
8.0
4.5
3.0
3.0
3.0
3.0
6.5
3.8
2.8
2.2
3.4
2.6
6.5
3.8
2.8
2.2
3.4
2.6
12.5
7.5
6.5
4.5
7.0
5.0
14.0
9.0
6.5
5.0
7.0
5.0
Typ
Max
T
A
= −40°C
to
+85°C
Min
75
150
200
250
175
200
2.5
1.5
1.0
0.8
1.0
1.0
2.5
1.5
1.0
0.8
1.0
1.0
6.5
3.5
2.0
1.5
2.0
1.5
0.5
0.5
0.5
0.5
0.5
0.5
6.0
4.0
3.0
2.0
3.0
2.0
8.0
4.5
3.0
3.0
3.0
3.0
ns
C
L
=
15 pF
R
D
=
1 MΩ
S
1
=
Open
C
L
=
50 pF
R
D
=
500
Ω,
S
1
=
Open
Figures
1, 4
ns
C
L
=
15 pF
R
D
=
1 MΩ
S
1
=
Open
CL
=
50 pF
R
D
=
500
Ω,
S
1
=
Open
Figures
1, 5
ns
C
L
=
15 pF
R
D
=
1 MΩ
S
1
=
Open
C
L
=
50 pF
R
D
=
500
Ω,
S
1
=
Open
Figures
1, 4
ns
C
L
=
15 pF
R
D
=
1 MΩ
S
1
=
Open
C
L
=
50 pF
R
D
=
500
Ω,
S
1
=
Open
Figures
1, 4
13.0
8.0
7.0
5.0
7.5
5.5
14.5
9.5
7.0
5.5
7.5
5.5
ns
C
L
=
15 pF
R
D
=
1 MΩ
S
1
=
Open
C
L
=
50 pF
R
D
=
500
Ω,
S
1
=
Open
Figures
1, 3
ns
C
L
=
15 pF
R
D
=
1 MΩ
S
1
=
Open
C
L
=
50 pF
R
D
=
500
Ω,
S
1
=
Open
Figures
1, 3
MHz
C
L
=
15 pF
R
D
=
1 MΩ
S
1
=
Open
C
L
=
50 pF
R
D
=
500Ω, S
1
=
Open
Figures
1, 5
Max
Units
Conditions
Figure
Number
Capacitance
(Note 3)
Symbol
C
IN
C
OUT
C
PD
Input Capacitance
Output Capacitance
Power Dissipation Capacitance (Note 4)
Parameter
Typ
3
4
10
12
Note 3:
T
A
= +25C,
f
=
1MHz.
Note 4:
C
PD
is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
CCD
) at no output
loading and operating at 50% duty cycle. (See Figure 2) C
PD
is related to I
CCD
dynamic operating current by the expression:
I
CCD
=
(C
PD
) (V
CC
) (f
IN
)
+
(I
CC
static).
Max
Units
pF
pF
pF
V
CC
=
0V
V
CC
=
0V
V
CC
=
3.3V
V
CC
=
5.0V
Conditions
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