LM555/NE555/SA555
t
H
- –------------------------------------
(R + R )C1
A
B
2
3
2
3
--
--
V
(t) =
V
= V
1 –
e
(4)
C1
CC
CC
t
= C (R + R )In2 = 0.693(R + R )C
(5)
H
1
A
B
A
B
1
The equivalent circuit for discharging capacitor C1, when timer output is low is, as follows:
RB
C1
VC1(0-)=2Vcc/3
RD
dv
1
+ R
C1
----------------------
C -------------- +
V
= 0
(6)
(7)
1
C1
R
dt
A
B
t
------------------------------------
-
(R + R )C1
2
A
D
--
V
(t) =
V
C1
e
3
CC
Since the duration of the timer output low state(t ) is the amount of time it takes for the V (t) to reach Vcc/3,
L
C1
t
L
------------------------------------
-
(R + R )C1
1
3
2
3
A
D
--
--
V
=
V
(8)
CC
e
CC
t
= C (R + R )In2 = 0.693(R + R )C
(9)
L
1
B
D
B
D
1
Since R is normally R >>R although related to the size of discharging Tr.,
D
B
D
tL=0.693R C
(10)
B 1
Consequently, if the timer operates in astable, the period is the same with
'T=t +t =0.693(RA+R )C +0.693R C =0.693(R +2R )C ' because the period is the sum of the charge time and discharge
H
L
B
1
B 1
A
B
1
time. And since frequency is the reciprocal of the period, the following applies.
1
T
1.44
frequency,
f = --- = ---------------------------------------
(11)
(R + 2R )C
A
B
1
3. Frequency divider
By adjusting the length of the timing cycle, the basic circuit of Figure 1 can be made to operate as a frequency divider. Figure
8. illustrates a divide-by-three circuit that makes use of the fact that retriggering cannot occur during the timing cycle.
7
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
