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KA7630 参数 Datasheet PDF下载

KA7630图片预览
型号: KA7630
PDF下载: 下载PDF文件 查看货源
内容描述: 固定式多路输出调节器 [Fixed Multi-Output Regulator]
分类和应用: 线性稳压器IC调节器电源电路输出元件局域网
文件页数/大小: 6 页 / 74 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
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KA7630/KA7631  
Electrical Characteristics(KA7631) (Continued)  
(Refer to test circuit Vin1=7.5V ,Vin2=11.5V ,T = +25°C, unless otherwise specified)  
j
Parameter  
Symbol  
Conditions  
Io1 = 10mA  
7.5V < Vin1 < 14V  
5mA < Io1 < 500mA  
Min.  
Typ.  
Max.  
Unit  
5
4.9  
5.1  
5.1  
5.2  
5.3  
Output Voltage 1  
Vo1  
V
Io2 = 10mA  
11.5V < Vin2 < 18V  
5mA < Io2< 500mA  
8.82  
8.65  
9
9
9.18  
9.35  
Output Voltage 2  
Vo2  
V
V
Dropout Output Voltage 1,2  
Line Regulation 1,2  
Vd1,2  
Io1,2 = 500mA  
-
-
-
-
2.5  
7.5V < Vin1< 14V  
50  
80  
Vo 1,2 11.5V < Vin2< 18V  
mV  
Io1,2 = 200mA  
5mA < Io1< 500mA  
Vo 1,2  
100  
160  
Load Regulation 1,2  
-
-
mV  
5mA < Io2 < 500mA  
Output Voltage 3  
Line Regulation 3  
Load Regulation 3  
Reset Pulse Delay  
Vo3  
Vo3  
Vo3  
Trd  
Vsys =13V, Io3 = 100mA  
13V < Vin2 <18V, Io3 =100mA  
5mA < Io3 < 1A  
11.7  
12  
-
12.3  
120  
250  
-
V
-
-
-
mV  
mV  
ms  
-
Cd = 100nF, Note1  
25  
Saturation Voltage in Reset  
Condition  
VrL  
I6 = 5mA  
-
-
0.4  
V
Leakage Current at Pin 6  
Output Voltage Thermal Drift  
Short Circuit Output Current  
Disable Voltage High  
IrH  
STt  
V6 = 10V  
-
-
10  
-
µA  
ppm/°C  
A
0°C < Tj < +125°C , Note2  
Vin1 = 7.5V ,Vin2 = 11.5V  
Output 2 Active  
Output 2 Disabled  
0V < Vdis < 7V  
Note2  
-
-
100  
Isc1,2  
VdisH  
VdisL  
Idis  
-
1.6  
2.0  
2.0  
2
0.8  
0.8  
-100  
-
-
V
Disable Voltage Low  
-
V
Disable Bias Current  
-
145  
-
µA  
°C  
Junction Temperature for TSD  
Quiescent Current  
Ttsd  
Iq  
-
Io1=10mA, Output2 Disabled  
K = Vo1  
-
2
mA  
V
Reset Threshold Voltage  
Reset Threshold Hysteresis  
Vr  
K-0.4 K-0.25 K -0.1  
20 50 100  
Vrth  
Note1  
mA  
Notes:  
1. To check the reset circuit ,the reset output is low to discharge the delay capacitor(=Cd). if it’s less than Vo1-0.25V. And the  
reset output is high when the delay capacitor voltage linearly increased by the internal current source(10µA) if it’s more than  
Vo1- 0.2V. The equation of delay time is same as below. Trd = (Cd × 2.5) / 10µA  
2. These parameters, although guaranteed, are not 100% tested in production.  
3
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