NC7SB3157, FSA3157 Low Voltage SPDT Analog Switch or 2:1 Multiplexer/Demultiplexer Bus Switch
AC Loading and Waveforms
V
I
FROM
OUTPUT
UNDER
TEST
RU
C
L
RD
Notes:
Input driven by 50Ω source terminated in 50Ω
C
L
includes load and stray capacitance
Input PRR = 1.0 MHz; t
W
= 500 ns
Figure 7. AC Test Circuit
t
r
= 2.5ns
90%
90%
50%
t
r
= 2.5ns
V
CC
t
r
= 2.5ns
90%
90%
50%
t
r
= 2.5ns
V
CC
Control
Input
10%
50%
10%
Switch
Input
10%
GND
t
PLZ
V
TRI
50%
t
PZL
10%
t
W
t
PLH
t
PHL
GND
Output
V
OH
50%
V
OL
+0.3V
V
OL
t
PHZ
V
OH
Output
50%
50%
t
PZH
V
OL
Output
50%
V
OH
–0.3V
V
TRI
Figure 8. AC Waveforms
V
IN
B
0
A
B
1
S
R
L
C
L
V
OUT
Logic
Input
V
OUT
Logic
Input
t
D
0.9 x V
OUT
Figure 9. Break Before Make Interval Timing
7
www.fairchildsemi.com
NC7SB3157, FSA3157 Rev. 1.0.1