FS8S0765RCB
3.2 Over Load Protection (OLP)
: When the load current
exceeds a pre-set level for longer than pre-determined time,
protection circuit should be activated in order to protect the
SMPS. Because of the pulse-by-pulse current limit
capability, the maximum peak current through the SMPS is
limited, and therefore the maximum input power is restricted
with a given input voltage. If the output consumes beyond
this maximum power, the output voltage together with pri-
mary side regulation voltage decrease below the set voltage.
This reduces the current through primary side regulation
transistor, which increases feedback voltage (Vfb). If Vfb
exceeds 2.7V, D1 is blocked and the 2uA current source
starts to charge Cfb slowly compared to when the 0.9mA
current source charges Cfb. In this condition, Vfb continues
increasing until it reaches 7.5V, and the switching operation
is terminated at that time as shown in figure 6. The delay
time for shutdown is the time required to charge Cfb from
2.7V to 7.5V with 2uA.
3.3 Over Voltage Protection (OVP) :
In case of malfunc-
tion in the primary side feedback circuit, or feedback loop
open caused by a defect of solder, the current through pri-
mary side control transistor becomes almost zero. Then, Vfb
climbs up in a similar manner to the over load situation, forc-
ing the preset maximum current to be supplied to the second-
ary side until the over load protection is activated. Because
energy more than required is provided to the output, the out-
put voltage may exceed the rated voltage before the over
load protection is activated, resulting in the breakdown of the
devices in the secondary side. In order to prevent this situa-
tion, an over voltage protection (OVP) circuit is employed.
When the Vcc voltage touches 37V, the OVP block is acti-
vated.
3.4 Thermal Shutdown (TSD) :
The SenseFET and the
control IC are built in one package. This makes it easy for
the control IC to detect the heat generation from the
SenseFET. When the temperature exceeds approximately
160°C, the thermal shutdown is activated.
4. Soft Start
: Figure 7 shows the soft start circuit. During
the initial start up, the 0.9 mA current source leaks out
through Css and Rss. As Css is charged, the leakage current
decreases. Therefore, by choosing much bigger Css than
Cfb, it is possible to increase the feedback voltage slowly
forcing the SenseFET current to increase slowly. After Css
reaches its steady state value, D3 is blocked and the soft
switching circuit is decoupled from the feedback circuit. If
the value of Css is too large, there is possibility that Vfb
increases to 7.5V activating the over load protection during
soft start time. In order to avoid this situation, it is recom-
mended that the value of Css should not exceed 100 times of
Cfb.
V
Vds
V
2V
2
1
V
5
9
V
Auto restart
tim
e
Vcc
tim
e
Over load protection
V
7V
.5
Vref
50K
Vf
b
C
ss
5
tim
e
Figure 5. The waveforms at the OLP and auto restart
R
ss
D3
4
Cfb
2.5R
OSC
PWM
COM
P.
D
S
V
FB
Over load protection
7.5V
2uA
0.9m
A
R
G TE
A
DRIV
ER
Voffset
FS8S0765RCB
2.7V
Figure 7. The circuit for the soft start
T
12
= Cfb*(7.5-2.7)/I
delay
T
1
T
2
t
Figure 6. Over load protection
5. Synchronization :
In order to reduce the effect of switch-
ing noise on the screen, the SMPS for monitor synchronizes
its switching frequency to an external signal, typically the
horizontal sync flyback signal. The switching frequency of
the FPS can vary from 20 kHz to 150 kHz according to the
12
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
