AN-9741
APPLICATION NOTE
The typical values for the primary-side and secondary-side
efficiencies are given as:
The secondary-side efficiency at 50% of nominal output
voltage (operating point B) can be approximated as:
η
P
≅
η
,
η
S
≅
η
;
V
O
<
10
V
η
P
≅
η
,
η
S
≅
η
;
V
O
>
10
V
2
3
1
3
1
3
2
3
(1)
η
S
@
B
0.5
×
V
O
V
+
V
≅
η
S
×
×
O N F
N
0.5
×
V
O
+
V
F
V
O
N
N
(6)
(2)
Then, the power supply input power and transformer input
power at 50% nominal output voltage (operating point B)
are given as:
P
IN
@
B
=
0.5
×
V
O
×
I
O
N
N
η
@
B
0.5
×
V
O
×
I
O
N
N
(7)
P
IN
_
T
@
B
=
η
S
@
B
(8)
The overall efficiency at the minimum output voltage
(operating point C) can be approximated as:
η
@
C
≅
η
×
Figure 4. Primary- and Secondary-Side Efficiency
V
O
V
O
min
min
V
+
V
×
O N F
+
V
F
V
O
N
(9)
where, Vo
min
is the minimum output voltage.
The secondary-side efficiency at minimum output voltage
(operating point C) can be approximated as:
With the estimated overall efficiency, the input power at
nominal output is given as:
P
IN
=
V
O
×
I
O
N
N
η
(3)
η
@
C
where V
ON
and I
ON
are the nominal output voltage and
current, respectively.
The input power of the transformer at nominal output is
given as:
V
+
V
≅
η
S
×
min
×
O N F
V
O
+
V
F
V
O
V
O
min
N
(10)
Then, the power supply input power and transformer input
power at the minimum output voltage (operating point C)
are given as:
P
IN
_
T
=
V
O
×
I
O
N
N
η
S
(4)
P
IN
@
C
=
V
O
min
×
I
O
N
η
@
C
V
O
min
(11)
N
When the output voltage drops below 50% of its nominal
value, the frequency is reduced to 33kHz to prevent CCM
operation. Thus, the transformer should be designed for
DCM both at 50% of nominal output voltage and minimum
output voltage.
As output voltage reduces in CC Mode, the efficiency also
drops. To optimize the transformer design, it is necessary to
estimate the efficiencies properly at 50% of nominal output
voltage and minimum output voltage conditions.
The overall efficiency at 50% of nominal output voltage
(operating point B) can be approximated as:
P
IN
_
T
@
B
=
×
I
O
η
S
@
C
(12)
[STEP-2] Determine the DC Link Capacitor
(C
DL
) and the DC Link Voltage Range
It is typical to select the DC link capacitor as 2-3 F per watt
of input power for universal input range (90 ~ 265V
RMS
) and
1 F per watt of input power for European input range (195
~ 265V
RMS
). With the DC link capacitor chosen, the
minimum DC link voltage is obtained as:
η
@
B
0.5
×
V
O
V
+
V
≅
η
×
×
O N F
N
0.5
×
V
O
+
V
F
V
O
N
N
(5)
V
DL
min
=
2
×
(
V
LINE
min 2
)
−
P
IN
(1
−
D
ch
)
C
DL
×
f
L
(13)
where V
F
is diode forward-voltage drop.
where V
LINEmin
is the minimum line voltage, C
DL
is the
DC link capacitor, f
L
is the line frequency, and D
ch
is the
DC link capacitor charging duty ratio defined as shown in
Figure 5 (typically about 0.2).
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© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.0 • 6/27/11
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