FDS8958B Dual N & P-Channel PowerTrench
®
MOSFET
December 2008
FDS8958B
Dual N & P-Channel PowerTrench
®
MOSFET
Q1-N-Channel: 30 V, 6.4 A, 26 mΩ Q2-P-Channel: -30 V, -4.5 A, 51 mΩ
Features
Q1: N-Channel
Max r
DS(on)
= 26 mΩ at V
GS
= 10 V, I
D
= 6.4 A
Max r
DS(on)
= 39 mΩ at V
GS
= 4.5 V, I
D
= 5.2 A
Q2: P-Channel
Max r
DS(on)
= 51 mΩ at V
GS
= -10 V, I
D
= -4.5 A
Max r
DS(on)
= 80 mΩ at V
GS
= -4.5 V, I
D
= -3.3 A
HBM ESD protection level > 3.5 kV (Note 3)
RoHS Compliant
General Description
These dual N- and P-Channel enhancement mode power field
effect transistors are produced using Fairchild Semiconductor's
advanced PowerTrench
®
process that has been especially
tailored to minimize on-state resistance and yet maintain
superior switching performance.
These devices are well suited for low voltage and battery
powered applications where low in-line power loss and fast
switching are required.
Application
DC-DC Conversion
BLU and motor drive inverter
D2
D2
D1
D1
G2
S2
G1
Pin 1
SO-8
S1
D1
8
1
S1
D2
D2
D1
5
6
Q1
Q2
4
3
2
G2
S2
G1
7
MOSFET Maximum Ratings
T
C
= 25 °C unless otherwise noted
Symbol
V
DS
V
GS
I
D
Drain to Source Voltage
Gate to Source Voltage
Drain Current
- Continuous
- Pulsed
Power Dissipation for Dual Operation
P
D
E
AS
T
J
, T
STG
Power Dissipation for Single Operation
Single Pulse Avalanche Energy
Operating and Storage Junction Temperature Range
T
A
= 25 °C
T
A
= 25 °C
(Note 1a)
(Note 1b)
(Note 4)
18
-55 to +150
T
A
= 25 °C
Parameter
Q1
30
±20
6.4
30
2.0
1.6
0.9
5
mJ
°C
W
Q2
-30
±25
-4.5
-30
Units
V
V
A
Thermal Characteristics
R
θJC
R
θJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
(Note 1)
(Note 1a)
40
78
°C/W
Package Marking and Ordering Information
Device Marking
FDS8958B
Device
FDS8958B
Package
SO-8
1
Reel Size
13 ”
Tape Width
12 mm
Quantity
2500 units
www.fairchildsemi.com
©2008 Fairchild Semiconductor Corporation
FDS8958B Rev.B