Package Outlines
Figure 2. SOIC-8 (Top View)
Thermal Characteristics(1)
(2)
(3)
(4)
(5)
(6)
Package
8-Pin Small Outline Integrated Circuit (SOIC)
Notes:
Units
JL
JT
JA
JB
JT
38
29
87
41
2.3
°C/W
1. Estimates derived from thermal simulation; actual values depend on the application.
2. Theta_JL (JL): Thermal resistance between the semiconductor junction and the bottom surface of all the leads (including any
thermal pad) that are typically soldered to a PCB.
3. Theta_JT (JT): Thermal resistance between the semiconductor junction and the top surface of the package, assuming it is
held at a uniform temperature by a top-side heatsink.
4. Theta_JA (ΘJA): Thermal resistance between junction and ambient, dependent on the PCB design, heat sinking, and airflow.
The value given is for natural convection with no heatsink, using a 2S2P board, as specified in JEDEC standards JESD51-2,
JESD51-5, and JESD51-7, as appropriate.
5. Psi_JB (JB): Thermal characterization parameter providing correlation between semiconductor junction temperature and an
application circuit board reference point for the thermal environment defined in Note 4. For the SOIC-8 package, the board
reference is defined as the PCB copper adjacent to pin 6.
6. Psi_JT (JT): Thermal characterization parameter providing correlation between the semiconductor junction temperature and
the center of the top of the package for the thermal environment defined in Note 4.
© 2008 Fairchild Semiconductor Corporation
FAN3213 / FAN3214 • Rev. 1.0.2
www.fairchildsemi.com
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