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CD4053 参数 Datasheet PDF下载

CD4053图片预览
型号: CD4053
PDF下载: 下载PDF文件 查看货源
内容描述: 单8通道模拟多路复用器/多路解复用器。双路4通道模拟多路复用器/多路解复用器。三重2通道模拟多路复用器/解复用 [Single 8-Channel Analog Multiplexer/Demultiplexer . Dual 4-Channel Analog Multiplexer/Demultiplexer . Triple 2-Channel Analog Multiplexer/Demultiplexe]
分类和应用: 解复用器
文件页数/大小: 13 页 / 144 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
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CD4051BC • CD4052BC • CD4053BC Single 8-Channel Analog Multiplexer/Demultiplexer • Dual 4-Channel Analog
Multiplexer/Demultiplexer • Triple 2-Channel Analog Multiplexer/Demultiplexer
November 1983
Revised August 2000
CD4051BC • CD4052BC • CD4053BC
Single 8-Channel Analog Multiplexer/Demultiplexer •
Dual 4-Channel Analog Multiplexer/Demultiplexer •
Triple 2-Channel Analog Multiplexer/Demultiplexer
General Description
The CD4051BC, CD4052BC, and CD4053BC analog mul-
tiplexers/demultiplexers are digitally controlled analog
switches having low “ON” impedance and very low “OFF”
leakage currents. Control of analog signals up to 15V
p-p
can be achieved by digital signal amplitudes of 3
15V. For
example, if V
DD
=
5V, V
SS
=
0V and V
EE
= −
5V, analog sig-
nals from
5V to
+
5V can be controlled by digital inputs of
0
5V. The multiplexer circuits dissipate extremely low qui-
escent power over the full V
DD
V
SS
and V
DD
V
EE
supply
voltage ranges, independent of the logic state of the control
signals. When a logical “1” is present at the inhibit input ter-
minal all channels are “OFF”.
CD4051BC is a single 8-channel multiplexer having three
binary control inputs. A, B, and C, and an inhibit input. The
three binary signals select 1 of 8 channels to be turned
“ON” and connect the input to the output.
CD4052BC is a differential 4-channel multiplexer having
two binary control inputs, A and B, and an inhibit input. The
two binary input signals select 1 or 4 pairs of channels to
be turned on and connect the differential analog inputs to
the differential outputs.
CD4053BC is a triple 2-channel multiplexer having three
separate digital control inputs, A, B, and C, and an inhibit
input. Each control input selects one of a pair of channels
which are connected in a single-pole double-throw configu-
ration.
Features
s
Wide range of digital and analog signal levels:
digital 3 – 15V, analog to 15V
p-p
s
Low “ON” resistance: 80
(typ.) over entire 15V
p-p
signal-input range for V
DD
V
EE
=
15V
s
High “OFF” resistance:
channel leakage of
±
10 pA (typ.) at V
DD
V
EE
=
10V
s
Logic level conversion for digital addressing signals of
3 – 15V (V
DD
V
SS
=
3 – 15V) to switch analog signals
to 15 V
p-p
(V
DD
V
EE
=
15V)
s
Matched switch characteristics:
R
ON
=
5
(typ.) for V
DD
V
EE
=
15V
s
Very low quiescent power dissipation under
digital-control input and supply conditions:
1
µ
W (typ.) at V
DD
V
SS
=
V
DD
V
EE
=
10V
s
Binary address decoding on chip
all
Ordering Code:
Order Number
CD4051BCM
CD4051BCSJ
CD4051BCMTC
CD4051BCN
CD4052BCM
CD4052BCSJ
CD4052BCN
CD4053BCM
CD4053BCSJ
CD4053BCN
Package Number
M16A
M16D
MTC16
N16E
M16A
M16D
N16E
M16A
M16D
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 2000 Fairchild Semiconductor Corporation
DS005662
www.fairchildsemi.com