AC Electrical Characteristics (Note 6)
T
A = 25°C, input tr, tf = 20 ns, CL = 50 pF, RL = 200 kΩ
Symbol
, t
Parameter
Conditions
Min
Typ
Max
Units
t
Propagation Delay Time
V
= 5V
240
100
70
350
175
140
200
100
80
ns
ns
PLH PHL
DD
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= 10V
= 15V
= 5V
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
ns
t
f
t
, t
Transition Time
100
50
ns
THL TLH
= 10V
= 15V
= 5V
ns
40
ns
Maximum Clock
Input Frequency
2.5
5
3.5
10
MHz
MHz
MHz
ns
CL
W
= 10V
= 15V
= 5V
8
16
Minimum Clock
Pulse Width
100
50
200
100
80
= 10V
= 15V
= 5V
ns
40
ns
t CL, t CL
Clock Rise and
15
µs
r
f
Fall Time (Note 6)
= 10V
= 15V
15
µs
15
µs
t
Minimum Set-Up Time
Serial Input
s
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= 5V
60
40
30
25
15
10
120
80
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
t
≥ 200 ns
= 10V
= 15V
= 5V
H
(Ref. to CL)
60
Parallel Inputs
50
t
≥ 200 ns
= 10V
= 15V
= 5V
30
H
(Ref. to P/S)
20
t
t
t
Minimum Hold Time
0
H
Serial In, Parallel In, t ≥ 400 ns
= 10V
= 15V
= 5V
10
s
Parallel/Serial Control
Minimum P/S
15
150
75
250
125
100
200
100
80
WH
REM
Pulse Width
= 10V
= 15V
= 5V
50
Minimum P/S Removal
Time (Ref. to CL)
100
50
= 10V
= 15V
40
C
C
Average Input Capacitance
Power Dissipation
Any Input
5
7.5
I
100
PD
Capacitance (Note 8)
Note 6: AC Parameters are guaranteed by DC correlated testing.
Note 7: If more than one unit is cascaded t CL should be made less than or equal to the fixed propagation delay of the output of the driving stage for the esti-
r
mated capacitive load.
Note 8: C determines the no load AC power consumption of any CMOS device. For complete explanation, see 74C family characteristics application note
PD
AN-90.
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