May 1999
BSS84 / BSS110
P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is designed to minimize on-state resistance, provide
rugged and reliable performance and fast switching. They
can be used, with a minimum of effort, in most applications
requiring up to 0.17A DC and can deliver pulsed currents up
to 0.68A. This product is particularly suited to low voltage
applications requiring a low current high side switch.
Features
BSS84: -0.13A, -50V. R
DS(ON)
= 10
Ω
@ V
GS
= -5V.
BSS110: -0.17A, -50V. R
DS(ON)
= 10
Ω
@ V
GS
= -10V
Voltage controlled p-channel small signal switch.
High density cell design for low R
DS(ON)
.
High saturation current
.
____________________________________________________________________________________________
S
G
D
Absolute Maximum Ratings
Symbol
Parameter
T
A
= 25°C unless otherwise noted
BSS84
BSS110
Units
V
DSS
V
DGR
V
GSS
I
D
P
D
T
J
,T
STG
T
L
Drain-Source Voltage
Drain-Gate Voltage (R
GS
< 20 K
Ω
)
Gate-Source Voltage - Continuous
Drain Current - Continuous @ T
A
= 30/35
o
C
- Pulsed
@ T
A
= 25
o
C
T
A
= 25
°
C
Maximum Power Dissipation
-0.13
-0.52
0.36
-50
-50
±20
-0.17
-0.68
0.63
-55 to 150
300
V
V
V
A
W
°C
°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering
purposes, 1/16" from case for 10 seconds
THERMAL CHARACTERISTICS
R
θ
JA
Thermal Resistance, Junction-to-Ambient
350
200
°C/W
© 1997 Fairchild Semiconductor Corporation
BSS84 Rev. C1 / BSS110. Rev. A2
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
