BSS84
July 2002
BSS84
P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode field effect
transistors are produced using Fairchild’s proprietary,
high cell density, DMOS technology. This very high
density process has been designed to minimize on-
state resistance, provide rugged and reliable
performance and fast switching. They can be used, with
a minimum of effort, in most applications requiring up to
0.13A DC and can deliver current up to 0.52A.
This product is particularly suited to low voltage
applications requiring a low current high side switch.
Features
•
•
•
−0.13A, −50V.
R
DS(ON)
= 10Ω @ V
GS
=
−5
V
Voltage controlled p-channel small signal switch
High density cell design for low R
DS(ON)
High saturation current
•
D
D
S
G
S
SOT-23
G
T
A
=25
o
C unless otherwise noted
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
T
J
, T
STG
T
L
Drain-Source Voltage
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
Maximum Power Dissipation
Derate Above 25°C
Parameter
Ratings
−50
±20
(Note 1)
Units
V
V
A
W
mW/°C
°C
−0.13
−0.52
0.36
2.9
−55
to +150
300
(Note 1)
Operating and Storage Junction Temperature Range
Maximum Lead Temperature for Soldering
Purposes, 1/16” from Case for 10 Seconds
Thermal Characteristics
R
θJA
Thermal Resistance, Junction-to-Ambient
(Note 1)
350
°C/W
Package Marking and Ordering Information
Device Marking
SP
Device
BSS84
Reel Size
7’’
Tape width
8mm
Quantity
3000 units
2002
Fairchild Semiconductor Corporation
BSS84 Rev B(W)