欢迎访问ic37.com |
会员登录 免费注册
发布采购

74LCX16244MTDX 参数 Datasheet PDF下载

74LCX16244MTDX图片预览
型号: 74LCX16244MTDX
PDF下载: 下载PDF文件 查看货源
内容描述: 低电压16位缓冲器/线路与5V容限输入和输出驱动器 [Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs and Outputs]
分类和应用: 总线驱动器总线收发器
文件页数/大小: 10 页 / 124 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
 浏览型号74LCX16244MTDX的Datasheet PDF文件第2页浏览型号74LCX16244MTDX的Datasheet PDF文件第3页浏览型号74LCX16244MTDX的Datasheet PDF文件第4页浏览型号74LCX16244MTDX的Datasheet PDF文件第5页浏览型号74LCX16244MTDX的Datasheet PDF文件第6页浏览型号74LCX16244MTDX的Datasheet PDF文件第7页浏览型号74LCX16244MTDX的Datasheet PDF文件第8页浏览型号74LCX16244MTDX的Datasheet PDF文件第9页  
74LCX16244 Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs and Outputs
February 1994
Revised May 2005
74LCX16244
Low Voltage 16-Bit Buffer/Line Driver
with 5V Tolerant Inputs and Outputs
General Description
The LCX16244 contains sixteen non-inverting buffers with
3-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus oriented transmit-
ter/receiver. The device is nibble controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The LCX16244 is designed for low voltage (2.5 or 3.3V)
V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX16244 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V to 3.6V V
CC
specifications provided
s
4.5 ns t
PD
max, 10
P
A I
CCQ
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
r
24 mA output drive (V
CC
3.0V)
s
Uses patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
!
2000V
Machine model
!
200V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCX16244G
(Note 2)(Note 3)
74LCX16244MEA
(Note 3)
74LCX16244MTD
(Note 3)
Package Number
BGA54A
MS48A
MTD48
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 2:
Ordering code “G” indicates Trays.
Note 3:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
GTO
¥
is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS012000
www.fairchildsemi.com