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74HCT08AN_08 参数 Datasheet PDF下载

74HCT08AN_08图片预览
型号: 74HCT08AN_08
PDF下载: 下载PDF文件 查看货源
内容描述: 四2输入与门 [Quad 2-Input AND Gate]
分类和应用:
文件页数/大小: 10 页 / 304 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
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74VHCT08A — Quad 2-Input AND Gate
February 2008
74VHCT08A
Quad 2-Input AND Gate
Features
High speed: t
PD
=
5.0ns (typ.) at T
A
=
25°C
High noise immunity: V
IH
=
2.0V, V
IL
=
0.8V
Power down protection is provided on all inputs and
General Description
The VHCT08A is an advanced high speed CMOS 2
Input AND Gate fabricated with silicon gate CMOS tech-
nology. It achieves the high-speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
The internal circuit is composed of 4 stages including
buffer output, which provide high noise immunity and
stable output.
Protection circuits ensure that 0V to 7V can be applied to
the input pins without regard to the supply voltage and to
the output pins with V
CC
=
0V. These circuits prevent
device destruction due to mismatched supply and input/
output voltages. This device can be used to interface 3V
to 5V systems and two supply systems such as battery
backup.
outputs
Low noise: V
OLP
=
0.8V (max.)
Low power dissipation: I
CC
=
2µA (max.) @ T
A
=
25°C
Pin and function compatible with 74HCT08
Ordering Information
Order Number
74VHCT08AM
74VHCT08ASJ
74VHCT08AMTC
74HCT08AN
Package
Number
M14A
M14D
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1997 Fairchild Semiconductor Corporation
74VHCT08A Rev. 1.3.0
www.fairchildsemi.com