MM74HC164
Connection Diagram
Truth Table
Inputs
Clear Clock
L
H
H
H
H
X
L
A
X
X
H
L
X
Top View
Outputs
B
X
X
H
X
L
Q
A
L
Q
AO
H
L
L
Q
B
L
Q
BO
Q
An
Q
An
Q
An
...
Q
H
L
Q
HO
Q
Gn
Q
Gn
Q
Gn
↑
↑
↑
H
=
HIGH Level (steady state), L
=
LOW Level (steady state)
X
=
Irrelevant (any input, including transitions)
↑ =
Transition from LOW-to-HIGH level.
Q
AO
, Q
BO
, Q
HO
=
the level of Q
A
, Q
B
, or Q
H
, respectively, before the indi-
cated steady state input conditions were established.
Q
An
, Q
Gn
=
The level of Q
A
or Q
G
before the most recent
↑
transition of the
clock; indicated a one-bit shift.
Logic Diagram
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