欢迎访问ic37.com |
会员登录 免费注册
发布采购

74ABT245CMTC 参数 Datasheet PDF下载

74ABT245CMTC图片预览
型号: 74ABT245CMTC
PDF下载: 下载PDF文件 查看货源
内容描述: 八路双向收发器与3态输出 [Octal Bi-Directional Transceiver with 3-STATE Outputs]
分类和应用: 总线驱动器总线收发器逻辑集成电路光电二极管信息通信管理
文件页数/大小: 13 页 / 295 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
 浏览型号74ABT245CMTC的Datasheet PDF文件第3页浏览型号74ABT245CMTC的Datasheet PDF文件第4页浏览型号74ABT245CMTC的Datasheet PDF文件第5页浏览型号74ABT245CMTC的Datasheet PDF文件第6页浏览型号74ABT245CMTC的Datasheet PDF文件第8页浏览型号74ABT245CMTC的Datasheet PDF文件第9页浏览型号74ABT245CMTC的Datasheet PDF文件第10页浏览型号74ABT245CMTC的Datasheet PDF文件第11页  
74ABT245 Octal Bi-Directional Transceiver with 3-STATE Outputs
Skew
SOIC package.
T
A
=
–40°C to +85°C,
V
CC
=
4.5V to 5.5V,
C
L
=
50pF, 8 Outputs
Switching
(12)
Symbol
t
OSHL(10)
t
OSLH(10)
t
PS
(14)
T
A
=
–40°C to +85°C,
V
CC
=
4.5V to 5.5V,
C
L
=
250pF, 8 Outputs
Switching
(13)
Max.
2.3
1.8
3.5
3.5
3.5
Parameter
Pin to Pin Skew, HL Transitions
Pin to Pin Skew, LH Transitions
Duty Cycle, LH–HL Skew
Pin to Pin Skew, LH/HL Transitions
Device to Device Skew,
LH/HL Transitions
Max.
1.3
1.0
2.0
2.0
2.0
Units
ns
ns
ns
ns
ns
t
OST(10)
t
PV(11)
Notes:
10. Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate
outputs of the same device. The specification applies to any outputs switching HIGH-to-LOW (t
OSHL
), LOW-to-HIGH
(t
OSLH
), or any combination switching LOW-to-HIGH and/or HIGH-to-LOW (t
OST
). The specification is guaranteed
but not tested.
11. Propagation delay variation for a given set of conditions (i.e., temperature and V
CC
) from device to device. This
specification is guaranteed but not tested.
12. This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described
switching in phase (i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.)
13. These specifications guaranteed but not tested. The limits represent propagation delays with 250pF load capacitors
in place of the 50pF load capacitors in the standard AC load.
14. This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same
pin. It is measured across all the outputs (drivers) on the same chip, the worst (largest delta) number is the
guaranteed specification. This specification is guaranteed but not tested.
Capacitance
Symbol
C
IN
C
I/O(15)
Parameter
Input Capacitance
I/O Capacitance
Conditions
T
A
=
25°C
V
CC
=
0V (OE, T/R)
V
CC
=
5.0V (A
n
, B
n
)
Typ.
5.0
11.0
Units
pF
pF
Note:
15. C
I/O
is measured at frequency f
=
1 MHz, per MIL-STD-883, Method 3012.
©1991 Fairchild Semiconductor Corporation
74ABT245 Rev. 1.4
www.fairchildsemi.com
7