24C16 参数 Datasheet PDF下载

NM24C16/17 – 16K-Bit Standard 2-Wire Bus Interface Serial EEPROM

Write Cycle Timing

SCL

SDA

8th BIT

WORD n

ACK

tWR

STOP

CONDITION

START

CONDITION

DS500072-8

Note:

The write cycle time (t

WR

) is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle.

Typical System Configuration

VCC

VCC

SDA

SCL

Master

Transmitter/

Receiver

Note:

Slave

Receiver

Slave

Transmitter/

Receiver

Master

Transmitter

Master

Transmitter/

Receiver

DS500072-9

Due to open drain configuration of SDA and SCL, a bus-level pull-up resistor is called for, (typical value = 4.7kΩ)

6

NM24C16/17 Rev. G

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