100336
Function Select Table
S
2
L
L
L
L
H
H
H
H
S
1
L
L
H
H
L
L
H
H
S
0
L
H
L
H
L
H
L
H
Function
Parallel Load
Complement
Shift Left
Shift Right
Count Down
Clear
Count Up
Hold
Pin Descriptions
Pin Names
CP
CEP
D
0
/CET
S
0
–S
2
MR
P
0
–P
3
D
3
TC
Q
0
–Q
3
Q
0
–Q
3
Description
Clock Pulse Input
Count Enable Parallel Input (Active LOW)
Serial Data Input/Count Enable
Trickle Input (Active LOW)
Select Inputs
Master Reset Input
Preset Inputs
Serial Data Input
Terminal Count Output
Data Outputs
Complementary Data Outputs
Truth Table
Q
0
=
LSB
Inputs
Outputs
MR S
2
S
1
S
0
CEP D
0
/CET D
3
CP Q
3
Q
2
Q
1
Q
0
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
H
L
L
H
H
L
L
L
L
H
H
H
H
L
L
H
H
L
L
L
H
H
L
H
L
H
L
L
L
H
L
L
L
H
L
H
L
H
L
L
H
L
H
X
X
X
X
L
H
X
X
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
H
X
L
L
H
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
TC
L
L
D
3
1
1
H
H
2
2
H
H
L
L
L
L
L
H
H
H
H
Mode
Preset (Parallel Load)
Invert
Shift to LSB
Count Down
Count Down with CEP not active
Count Down with CET not active
Clear
Count Up
Count Up with CEP not active
Count Up with CET not active
Hold
P
3
P
2
P
1
P
0
Q
3
Q
2
Q
1
Q
0
D
3
Q
3
Q
2
Q
1
(Q
0–3
) minus 1
Q
2
Q
1
Q
0
D
0
Q
3
(Note 1) Shift to MSB
X Q
3
Q
2
Q
1
Q
0
X Q
3
Q
2
Q
1
Q
0
L
L
L
L
(Q
0–3
) plus 1
X Q
3
Q
2
Q
1
Q
0
X Q
3
Q
2
Q
1
Q
0
X Q
3
Q
2
Q
1
Q
0
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Asynchronous
Master Reset
1
=
L if Q
0
–Q
3
=
LLLL
H if Q
0
–Q
3
≠
LLLL
2
=
L if Q
0
–Q
3
=
HHHH
H if Q
0
–Q
3
≠
HHHH
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Don't Care
=
LOW-to-HIGH Transition
Note 1:
Before the clock, TC is Q
3
After the clock, TC is Q
2
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FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
