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100328QI 参数 Datasheet PDF下载

100328QI图片预览
型号: 100328QI
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗八路ECL / TTL双向转换器与锁存 [Low Power Octal ECL/TTL Bi-Directional Translator with Latch]
分类和应用: 转换器电平转换器驱动程序和接口锁存器接口集成电路
文件页数/大小: 14 页 / 142 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
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Commercial Version (Continued)  
DIP ECL-to-TTL AC Electrical Characteristics  
VEE = −4.2V to 5.7V, VTTL = +4.5V to +5.5V, VCC = VCCA = GND, CL = 50 pF  
T
C = 0°C  
T
C = 25°C  
T
C = 85°C  
Symbol  
Parameter  
Units  
Conditions  
Figures 3, 4  
Min  
Max  
Min  
Max  
Min  
Max  
tPLH  
tPHL  
tPLH  
tPHL  
tPZH  
tPZL  
tPHZ  
tPLZ  
tPHZ  
tPLZ  
tSET  
tHOLD  
En to Tn  
2.3  
5.6  
7.2  
2.4  
5.6  
7.2  
2.6  
5.9  
7.7  
ns  
(Transparent)  
LE to Tn  
3.1  
3.1  
3.3  
ns  
Figures 3, 4  
OE to Tn  
3.4  
3.8  
3.2  
3.0  
2.7  
2.8  
1.1  
2.1  
4.1  
8.45  
9.2  
3.7  
4.0  
3.3  
3.4  
2.8  
3.1  
1.1  
2.1  
4.1  
8.95  
9.2  
4.0  
4.3  
3.5  
4.1  
3.1  
4.0  
1.1  
2.6  
4.1  
9.7  
9.95  
9.2  
ns  
ns  
ns  
Figures 3, 5  
Figures 3, 5  
Figures 3, 6  
(Enable Time)  
OE to Tn  
8.95  
7.7  
8.95  
8.7  
(Disable Time)  
DIR to Tn  
9.95  
8.95  
9.2  
8.2  
8.7  
(Disable Time)  
En to LE  
7.45  
7.95  
ns  
ns  
ns  
Figures 3, 6  
Figures 3, 4  
Figures 3, 7  
En to LE  
t
PW(H)  
Pulse Width LE  
SOIC and PLCC TTL-to-ECL AC Electrical Characteristics  
VEE = −4.2V to 5.7V, VTTL = +4.5V to +5.5V  
T
C = 0°C  
T
C = 25°C  
T
C = 85°C  
Symbol Parameter  
Units  
Conditions  
Min  
Max  
Min  
Max  
Min  
Max  
tPLH  
tPHL  
tPLH  
tPHL  
tPZH  
Tn to En  
1.1  
1.7  
1.3  
1.5  
1.6  
3.3  
3.4  
4.0  
4.3  
4.1  
1.1  
3.4  
3.5  
4.2  
4.3  
4.1  
1.1  
3.6  
3.7  
4.6  
4.4  
4.3  
ns  
Figures 1, 2  
Figures 1, 2  
Figures 1, 2  
Figures 1, 2  
Figures 1, 2  
(Transparent)  
LE to En  
1.7  
1.5  
1.6  
1.6  
1.9  
1.7  
1.6  
1.7  
ns  
ns  
ns  
ns  
OE to En  
(Cutoff to HIGH)  
tPHZ  
OE to En  
(HIGH to Cutoff)  
tPHZ  
DIR to En  
(HIGH to Cutoff)  
tSET  
Tn to LE  
1.0  
1.0  
2.0  
0.6  
1.0  
1.0  
2.0  
0.6  
1.0  
1.0  
2.0  
0.6  
ns  
ns  
ns  
ns  
Figures 1, 2  
Figures 1, 2  
Figures 1, 2  
Figures 1, 2  
tHOLD  
Tn to LE  
t
PW(H)  
Pulse Width LE  
tTLH  
Transition Time  
1.6  
200  
200  
650  
650  
1.6  
200  
200  
650  
650  
1.6  
200  
200  
650  
650  
tTHL  
20% to 80%, 80% to 20%  
Maximum Skew Common Edge  
Output-to-Output Variation  
Data to Output Path  
Maximum Skew Common Edge  
Output-to-Output Variation  
Data to Output Path  
Maximum Skew Opposite Edge  
Output-to-Output Variation  
Data to Output Path  
Maximum Skew  
tOSHL  
PLCC Only  
(Note 10)  
ps  
ps  
ps  
ps  
tOSLH  
tOST  
tPS  
PLCC Only  
(Note 10)  
PLCC Only  
(Note 10)  
PLCC Only  
(Note 10)  
Pin (Signal) Transition Variation  
Data to Output Path  
Note 10: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same  
packaged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH), or in oppo-  
site directions both HL and LH (tOST). Parameters tOST and tps guaranteed by design.  
5
www.fairchildsemi.com  
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